When you publish failed cycle information for a test a Semiconductor Multi Test step defines, TSM stores the failed cycle information in the Functional Test Record (FTR) for that test. Because an FTR can contain failed cycle information only for a single cycle, TSM writes multiple FTRs to the STDF Log file if the data contains information for multiple failed cycles.

TSM stores the failed cycle information in the following fields of the FTR:

Field Value
CYCL_CNT Cycle number from the NI-Digital Pattern Driver History RAM information. If this value is larger than a 32-bit number, TSM does not set this field.
REL_VADR Vector number from the NI-Digital Pattern Driver History RAM cycle information.
NUM_FAIL Number of pins in the pattern with 1 or more failures.
RTN_ICNT Number of actual pin states from the NI-Digital Pattern Driver History RAM cycle information.
PGM_ICNT Number of expected pin states from the NI-Digital Pattern Driver History RAM cycle information.
RTN_INDX Array of pin indexes that corresponds to the actual pin states from the NI-Digital Pattern Driver History RAM cycle information. Each pin index refers to a pin index defined in a Pin Map Record (PMR) for the pin.
RTN_STAT Actual pin states from the NI-Digital Pattern Driver History RAM cycle information.
PGM_INDX Array of pin indexes that corresponds to the expected pin states from the NI-Digital Pattern Driver History RAM cycle information. Each pin index refers to a pin index defined in a PMR for the pin.
PGM_STAT Expected pin states from the NI-Digital Pattern Driver History RAM cycle information.
FAIL_PIN Bitfield that corresponds to the values in the per-pin pass fail array from the NI-Digital Pattern Driver History RAM cycle information. Each bit corresponds to a pin index defined in a PMR record. For example, if the bit in position 1 is set, the pin defined in the PMR with a pin index of 1 failed for the cycle.
VECT_NAM Pattern name from the NI-Digital Pattern Driver History RAM cycle information.
TIME_SET Time set name from the NI-Digital Pattern Driver History RAM cycle information.

Expected Pin State Information in STDF Log Files

The failed cycle information includes the expected pin states from the NI-Digital Pattern Driver History RAM cycle information. TSM stores this information in the PGM_STAT field of the FTR. The pin states from the NI-Digital Pattern Driver History RAM cycle information correspond to the pin states defined in the STDF V4 specification according to the following table.

NI-Digital Pattern Driver Pin State STDF Pin State Value STDF Pin State Description
0 0 Drive Low
1 1 Drive High
L 2 Expect Low
H 3 Expect High
M 4 Expect Midband
V 5 Expect Valid (not midband)
X 6 Do not drive or compare

Actual Pin State Information in STDF Log Files

The failed cycle information includes the actual pin states from the NI-Digital Pattern Driver History RAM cycle information. TSM stores this information in the RTN_STAT field of the FTR. The pin states from the NI-Digital Pattern Driver History RAM cycle information correspond to the pin states defined in the STDF V4 specification according to the following table.

NI-Digital Pattern Driver Pin State STDF Pin State Value STDF Pin State Description
L 0 0 or Low
H 1 1 or High
M 2 Midband
V* 11 —

* This pin state is not defined in the STDF specification. The NI-Digital Pattern Driver uses this state only when Vol > Voh and the pin voltage level is between Vol and Voh.

Edge Multiplier Representation

When a pin uses an edge multiplier of 2, the NI-Digital Pattern Driver includes two pin states for that pin in the History RAM cycle information. For these pins, the FTR contains duplicate pin indexes to represent both pin states in the PGM_STAT and RTN_STAT fields.

For example, if the pattern uses two pins with PMR pin indexes 1 and 2, and pin index 1 uses an edge multiplier of 2, but pin index 2 uses an edge multiplier of 1, the pin index and pin state fields in the FTR appear as shown in the following table.

Field Value
PGM_INDX [1, 1, 2]
PGM_STAT [L, L, H]
RTN_INDX [1, 1, 2]
RTN_STAT [0, 0, 1]