F-RAM Memory Validation and Debugging with NI PXI and Modular Instruments

Chris Wray, Ramtron International

"With PXI, we developed tests faster to debug and characterize faulty memory chips with more flexibility than our previous automated test equipment in the lab."

- Chris Wray, Ramtron International

The Challenge:

Creating a flexible, cost-effective ferroelectric RAM (F-RAM) memory test system as an alternative to existing automated test equipment (ATE) for functional verification of new products and quick diagnosis of problematic memory units returned by customers.

The Solution:

Developing a PXI-based test system using modular instruments and NI LabVIEW to interface with packaged F-RAM memory chips for a variety of mixed-signal tests to validate performance and isolate digital bit errors.

Author(s):

Chris Wray - Ramtron International
Kurt Schwartz - Ramtron International
Bill Kraus - Ramtron International

 

While there are different types of memory commonly used in electronics today, depending on the needs of the application, memory suppliers face the increasing economic pressures to lower test costs while maintaining strong yields to ensure customers receive high-quality parts to use in their designs.

 

Ramtron International Corporation is the leading supplier of nonvolatile ferroelectric semiconductors including serial and parallel ferroelectric random-access memory (F-RAM) devices and processor companion devices, which integrate a variety of commonly needed discrete analog and mixed-signal functions for processor-based systems.

 

We developed a low-cost memory test system using off-the-shelf components and the PXI platform to increase our debugging capabilities for failing parts to determine the root cause for failure faster. We developed a test system to debug faulty memory chips returned by our customers, as well as for first silicon validation to help verify the functionality of new memory designs. With NI modular instruments and LabVIEW, we built a more flexible test system that is easier to program than our previous automated test equipment.

 

Overview of F-RAM and Other Common Memory Devices

Semiconductor memories today can be divided into two main categories: volatile and nonvolatile memory. Volatile memory is a type of high-performance, high-density memory which retains its value when power is applied, but loses stored values when power is no longer present.   Nonvolatile memory typically has lower density, but has the added advantage of retaining stored memory values when power is interrupted or lost.

 

Depending on the application, there are varieties of memory architectures actively used in today’s market. Two of the most common types of volatile memory—static random access memory (SRAM) and dynamic random access memory (DRAM)—are used as main memory in many PCs today. Read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), and flash memory are other nonvolatile memories based on technologies that allow them to be erased and reprogrammed multiple times, but may write more slowly and require higher voltages than volatile memory. Also, EEPROM-based technologies eventually wear out (in as little as 1E5 cycles), which poses a risk for high-endurance industrial applications.

 

Ferroelectric random access memory (F-RAM) is a type of nonvolatile memory, pioneered by Ramtron which combines the best of RAM and ROM memories into a single package. F-RAM memory contains a thin ferroelectric film of lead zirconate titanate [Pb(Zr,Ti)O3], commonly referred to as PZT. The Zr/Ti atoms in the PZT change polarity in an electric field, thereby producing a binary switch. Unlike RAM devices, F-RAM retains its data memory when power is shut off or interrupted, due to the PZT crystal maintaining polarity, making F-RAM a unique nonvolatile memory technology that outperforms other nonvolatile memories with remarkably fast writes, high endurance, and ultralow-power consumption.

 

Test Requirements for First Silicon Validation and Debugging Memory Chips

We produce a variety of packaged F-RAM memory chips with varying densities and operating voltages. Some chips may have real-time clocks or processor-companion features that we also have to test. Each test system needs to be able to accommodate functional testing of 3.3 and 5V memory chips to determine which memory bits are good and bad. The system also has to support bidirectional digital communication of common parallel and serial interfacing protocols (like SPI and I2C) so that we can set different test modes on the chip to tweak timing and adjust the reference line voltage drop between zero and one.

 

 

Memory chips can have a variety of different pin packages.  The TSOP-II-44-pin package (Figure 1), commonly used in our higher density parallel F-RAM devices, has two power and two ground pins. Parametrics are tested with functionality, at speed on all bits while tracking the digital I/O. We test source voltage (VDD) for power-up and power-down ramp rates, check for standby (active) current during operation, and monitor power (band gap) to check if the VDD drops below a certain threshold. We conduct leakage tests on every pin with measurements typically in the nanoamp range.

 

Test System Hardware

We needed our test equipment to meet our entire test requirements, yet allow for flexibility necessary to interface with different memory packages, and to allow for specialized measurements when debugging failing parts. We used PXI to develop our test equipment because of its modularity and small footprint. We used several other instruments including the NI PXI-4110 power supply, two NI PXI-6551 50 MHz bidirectional digital I/O modules, an NI PXI-4071 7 ½ digit digital multimeter (DMM), and an NI PXI-2532 512-crosspoint matrix switch module.

 

The PXI-4110 module provides the main power source for the memory chip and works well because it has three channels (two positive and one negative). With this module, we perform curve tracing of the I/O using one channel to power up our device, one to force positive, and the other to force negative voltages in ammeter mode. We use the power supply to control the ramp rate of VDD from less than one millisecond (on the fast side) to as slow as 10 seconds for our power-up and power-down tests. While we vary the supply power, we measure the digital bit errors using the PXI-6551 digital I/O (DIO) module read voltage and current with the PXI-4071 DMM.

 

The PXI-6551 digital module drives the functional behavior of the chip and forces address pins to test various memory locations. The DIO module allows for programmable voltage levels in 10 mV increments for VOH, VOL, VIH, and VIL, allowing us to sweep and characterize input and output voltage-level specifications for the memory chips. We can also adjust our timing to allow for different hold and read times with respect to the falling edge of chip enable.

 

The PXI-2532 switch handles signal routing between the power supply and the DMM for parametric measurements on all of the DIO pins on the packaged memory chip. The switch is connected along with the DIO module to mating connectors on a custom printed circuit board (PCB) shown in Figure 2, which we created to house the packaged F-RAM chipsets during a test.

 

Test System Software

One of the challenges we experienced with our previous test system was that we had a limited number of programmers on staff that were capable of programming the ATE. To ensure that this new system was easy to use for anyone in the lab, we used a combination of NI software including NI LabVIEW and LabVIEW SignalExpress with the NI Digital Waveform Editor to design the tests that we run on our memory chips.

 

We wrote the main application and user interface in LabVIEW and used the software to automate the majority of our tests including curve tracing and measuring and plotting the current over voltage. We configured the digital I/O module to send out various patterns used to verify the functionality of the memory chip and invoke test modes for reliability interrogation. The flexibility of LabVIEW was extremely helpful and will simplify the process of adding measurements in the future, as needed.

 

The digital test vectors sent to the memory chip were created using the NI Digital Waveform Editor.  The editor is a graphical software tool used to visualize digital waveforms and makes it easy for you to drag edges and manipulate waveforms as needed for different functional tests.  We use the NI Digital Waveform Editor together with LabVIEW SignalExpress to run quick tests. The integration between the NI Digital Waveform Editor and LabVIEW SignalExpress allowed us to run tests with no programming at all.

 

We used several other software tools from National Instruments as well.  NI Switch Executive is used to configure and interact with the switch matrix through a graphical interface, allowing us to name switch routes and interacts well with LabVIEW. We also used the soft front panels for the power supply and the DMM to make quick one-off measurements when debugging memory chips.

 

Successful Development of a Modular Test Platform with PXI

PXI provided us with a modular test platform that addressed all of our test requirements to characterize and debug F-RAM memory chips. Our PXI system has a small footprint and is very portable, allowing us to easily move the test system between lab stations or travel with it when visiting customers for onsite analysis. With PXI, we developed tests faster to debug and characterize faulty memory chips with more flexibility than our previous automatic test equipment in the lab, providing our customers with reliable products at an affordable price.

 

Author Information:

Chris Wray
Ramtron International
Tel: 719.481.7182
chris.wray@ramtron.com

Figure 1. A packaged memory chip has several types of pins including address and data lines, control pins, and power connections.
Figure 2. We created a set of custom PCBs to interface our PXI instrumentation to different F-RAM memory packages.