Before you begin, create a PXIe-657x interface using the Digital Pattern Editor and configure the interface using the Semiconductor Device Control Add-On.

The Semiconductor Device Control Add-On supports the following protocols:

Configuring an I2C Master Protocol

Ensure that you open your Semiconductor Device Control Add-On project in a large panel before configuring interfaces and functions.

Complete the following steps to configure an I2C master protocol for a PXIe-657x interface.

  1. Click Conf I/F to open the Hardware Configuration tab of the large panel.
  2. In the configuration section of the Hardware Configuration tab, select the PXIe-657x interface that you want to add a protocol to and click Add Function.
  3. Select Protocol from the Function Type list, and select I2C Master from the list of protocols. Enter the name of the protocol, and click Add.
  4. Select the new protocol in the list to display the configuration options to the right.
  5. Configure the pin settings for the protocol.
    1. Select the pin group using the Pin Group drop-down menu.
    2. Select the I2C data pin using the Data Pin drop-down menu.
    3. Select the bus number using the Bus drop-down menu.
  6. Configure the pattern project settings for the protocol.
    1. Select the write pattern from the Write Pattern Name drop-down menu.
    2. Select the read pattern from the Read Pattern Name drop-down menu.
    3. Select the timing file from the Timing File Name drop-down menu.
    4. Select the voltage level file from the Levels File Name drop-down menu.
    5. Enter the clock frequency from the Clock Rate (kHz) input.
    6. Select the I2C mode of operation from the I2C Mode drop-down menu.
  7. Configure the I2C settings for the protocol.
    1. Select the size of the slave address from the Addressing Mode drop-down menu.
    2. Enter the I2C 7-bit slave address in the Slave Address input.
  8. Configure the data order settings for the protocol.
    1. Select the starting point for the address and data from the Bit Order drop-down menu.
    2. Select the byte order for the address and data from the Byte Order drop-down menu.
  9. Click Start on the top pane of the large panel interface to initiate hardware communication.
    The dynamic configuration settings window shows.
  10. If you are using digital pattern instruments and Measurement Plug-Ins with the Semiconductor Device Control Add-On, click Manual Layout on the InstrumentStudio Home screen to start the required Measurement Plug-Ins processes for sharing NI digital sessions.
    Note To ensure NI digital sessions are available for other measurements, stop all hardware communication after completing operations in the Semiconductor Device Control Add-On and before closing the SDC large panel.
  11. Configure the dynamic settings for the protocol.
    Note Dynamic settings can be set only while hardware communication is active, either programmatically or through the user interface. Use the Get Protocol Dynamic Setting and Set Protocol Dynamic Setting functions to obtain and adjust dynamic settings during protocol execution. Refer to the API Reference section for information about these dynamic setting functions.
    1. Set the clock frequency in the Clock Rate input.
    2. Select the I2C mode of operation from the I2C Mode drop-down menu.
    3. Enter the I2C 7-bit slave address into the Slave Address input.
    4. Enter the high-speed code into the High Speed Code input.
    5. Enter the clock rate, in kHz, at which to burst the high-speed code into the HS Code Clock Rate input.

Configuring an I3C® Master Protocol

Complete the following steps to configure an I3C master protocol for a PXIe-657x interface.

  1. Click Conf I/F to open the Hardware Configuration tab of the large panel.
  2. Select the PXIe-657x interface that you intend to add a protocol to and click Add Function.
  3. Select Protocol from the Choose Function list and select I3C Master from the list of protocols.
  4. Enter the name of the protocol and click Add.
  5. Select the new protocol in the list to display configuration options.
  6. Configure the pin settings for the protocol.
    1. Select the pin group from the Pin Group drop-down menu.
    2. Select the I3C data pin from the Data Pin drop-down menu.
    3. Select the bus number from the Bus drop-down menu.
  7. Configure the pattern settings for the protocol.
    1. Select the timing file from the Timing File Name drop-down menu.
    2. Select the voltage level file from the Levels File Name drop-down menu.
  8. Configure the I3C settings for the protocol.
    1. Enter the clock frequency in the Clock Rate (kHz) input.
    2. Enter the 7-bit slave address in the Slave Address 0x input.
  9. Click Start on the top pane of the large panel interface to initiate hardware communication.
    The dynamic configuration settings window opens.
  10. If you are using digital pattern instruments and Measurement Plug-Ins with the Semiconductor Device Control Add-On, click Manual Layout on the InstrumentStudio Home screen to start the required Measurement Plug-Ins processes for sharing NI digital sessions.
    Note To ensure NI digital sessions are available for other measurements, stop all hardware communication after completing operations in the Semiconductor Device Control Add-On and before closing the SDC large panel.
  11. Configure the CCC settings.
    1. Select the CCC operation type for the I3C protocol from the I3C CCC Operation drop-down menu.
    2. Select the type of CCC to be executed from the CCC Type drop-down menu.
    3. Select the command name from the Command Name drop-down menu.
    4. Enter the 7-bit dynamic address in the Dynamic Address 0x input to assign the dynamic address to the DUT.
      After the dynamic address is assigned, the value in the Current Slave Address input will be updated.
    5. Enter the defining byte value in hexadecimal in the Defining Byte 0x input.
    6. Enter the byte length to read in the Read Byte Length input for a read command.
    7. Enter the hexadecimal data to be written in the Write Data 0x input.
  12. Click Execution.
    The data read from the hardware shows in the Read Data 0x input.

I3C® Specification Features Supported by the Semiconductor Device Control Add-On

The Semiconductor Device Control Add-On supports the following features of the I3C protocol:
  • Legacy I2C Write—Writes data to single or multiple registers using the legacy I2C communication mode. The clock rate for legacy I2C write operation is up to 1 MHz.
  • Legacy I2C Read—Reads data from single or multiple registers using the legacy I2C communication mode. The clock rate for legacy I2C read operation is up to 1 MHz.
  • I3C SDR Write—Writes data to single or multiple registers using the I3C Single Data Rate (SDR) communication mode. The clock rate for I3C SDR write operation is up to 12.5 MHz.
  • I3C SDR Read—Reads data from single or multiple registers using the I3C SDR communication mode. The clock rate for I3C SDR read operation is up to 12.5 MHz.
  • SDR CCC Commands—Executes the following common command code (CCC) commands in SDR mode.
    Command CodeCommand Name
    0x00ENEC
    0x01DISEC
    0x02ENTAS0
    0x03ENTAS1
    0x04ENTAS2
    0x05ENTAS3
    0x06RSTDAA
    0x07ENTDAA
    0x09SETMWL
    0x0ASETMRL
    0x0BENTTM
    0x0CSETBUSCON
    0x20ENTHDR0
    0x21ENTHDR1
    0x22ENTHDR2
    0x23ENTHDR3
    0x24ENTHDR4
    0x25ENTHDR5
    0x26ENTHDR6
    0x27ENTHDR7
    0x28SETXTIME
    0x29SETAASA
    0x2BDEFGRPA
    0x2CRSTGRPA
    0x80ENEC
    0x81DISEC
    0x82ENTAS0
    0x83ENTAS1
    0x84ENTAS2
    0x85ENTAS3
    0x87SETDASA
    0x88SETNEWDA
    0x89SETMWL
    0x8ASETMRL
    0x8BGETMWL
    0x8CGETMRL
    0x8DGETPID
    0x8EGETBCR
    0x8FGETDCR
    0x90GETSTATUS
    0x94GETMXDS
    0x95GETCAPS
    0x98SETXTIME
    0x99GETXTIME
    0x9BSETGRPA
    0x9CRSTGRPA
    Note The Semiconductor Device Control Add-On supports only commands that follow the standard direct or broadcast frame structures.
  • I3C Dynamic Addressing—Executes the following CCC commands to assign dynamic addresses in I3C communication mode:
    • ENTDAA
    • SETDASA
    • SETAASA
    • RSTDAA
    • SETNEWDA
  • Note The Semiconductor Device Control Add-On does not support switching between open-drain and push-pull modes during I3C read and write operations, and uses the push-pull configuration with open-drain timing parameters when open-drain configuration is required.
    Note During read operations, the number of bytes used to read data is pre-determined. The Semiconductor Device Control Add-On does not read data based on the end of data sequence sent by the slave.
    Note The Semiconductor Device Control Add-On does not support time domain reflectometry (TDR) configuration for I3C protocol. Refer to the TDR topic in the Digital Pattern Help for detailed information.

    Configuring an SPI Master Protocol

    Ensure that you open your Semiconductor Device Control Add-On project in a large panel before configuring interfaces and functions.

    Complete the following steps to configure an SPI master protocol for a PXIe-657x interface.

    1. Click Conf I/F to open the Hardware Configuration tab of the large panel.
    2. In the configuration section of the Hardware Configuration tab, select the PXIe-657x interface that you want to add a protocol to and click Add Function.
    3. Select Protocol from the Function Type list, and select SPI Master from the list of protocols. Enter the name of the protocol, and click Add.
    4. Select the new protocol in the list to display the configuration options.
    5. Configure the pin settings for the protocol.
      1. Select the pin group based on the wire configuration of the SPI using the Pin Group drop-down menu.
      2. Select the read pin or MISO pin using the Read Pin drop-down menu.
      3. Select the write pin or MOSI pin using the Write Pin drop-down menu.
      4. Select the bus number using the Bus drop-down menu.
    6. Configure the pattern project settings for the protocol.
      1. Select the write pattern from the Write Pattern Name drop-down menu to satisfy clock polarity requirements for the protocol.
      2. Select the read pattern from the Read Pattern Name drop-down menu to satisfy clock polarity requirements for the protocol.
      3. Select the timing file from the Timing File Name drop-down menu to satisfy clock polarity and phase requirements for the protocol.
      4. Select the voltage level file from the Level File Name drop-down menu.
      5. Enter the clock frequency, in kHz, the Clock Frequency input.
    7. Configure the data order settings for the protocol.
      1. Select the starting point for the address and data from the Bit Order drop-down menu.
      2. Select the byte order for the address and data from the Byte Order drop-down menu.
    8. Configure the read/write command settings for the protocol.
      1. Select whether to add the read/write bit to SPI transactions using the Encode Command toggle.
      2. Enter the bit value to encode in the read command using the Read Command input.
      3. Enter the bit value to encode in the write command using the Write Command input.
      4. Enter a numerical value in the Address Offset field. The read and write commands will use this value as a starting point when replacing address bits.

    Configuring an MIPI® RFFE Master Protocol

    Ensure that you open your Semiconductor Device Control Add-On project in a large panel before configuring interfaces and functions.

    Note The Semiconductor Device Control Add-On supports the MIPI® RFFE v2.1 protocol.

    Complete the following steps to configure an MIPI® RFFE master protocol for a PXIe-657x interface.

    1. Click Conf I/F to open the Hardware Configuration tab of the large panel.
    2. In the configuration section of the Hardware Configuration tab, select the PXIe-657x interface that you want to add a protocol to and click Add Function.
    3. Select Protocol from the Function Type list, and select RFFE Master from the list of protocols. Enter the name of the protocol, and click Add.
    4. Select the new protocol in the list to display the configuration options to the right.
    5. Configure the pin settings for the protocol.
      1. Select the pin group using the Pin Group drop-down menu.
      2. Select the clock pin using the Clock Pin drop-down menu.
      3. Select the data pin using the Data Pin drop-down menu.
      4. Select the bus number using the Bus drop-down menu.
    6. Configure the pattern project settings for the protocol.
      1. Select the write pattern from the Write Pattern Name drop-down menu.
      2. Select the read pattern from the Read Pattern Name drop-down menu.
      3. Select the timing file from the Timing File Name drop-down menu.
      4. Select the voltage level file from the Levels File Name drop-down menu.
      5. Enter the clock frequency in the Clock Rate (kHz) input.
    7. Configure the MIPI® RFFE settings for the protocol.
      1. Enter the 4-bit slave address in the Slave Address input.
      2. Select the MIPI® RFFE command type from the R/W Command drop-down menu.
      3. Choose whether to validate or ignore the parity check from the Parity Check drop-down menu.
    8. Configure the Time Domain Reflectometry (TDR) settings for the protocol.
      1. Enter the TDR factor to be applied on the data pin in the Data Pin TDR(ns) input.
      2. Enter the TDR factor to be applied on the clock pin in the Clock Pin TDR(ns) input.
      Note Refer to the NI Digital Pattern Help for more information about how to configure TDR.

    MIPI® RFFE Specification Features Supported by the Semiconductor Device Control Add-On

    The Semiconductor Device Control Add-On supports the following features of the MIPI® RFFE protocol:

    • VIO with configurable current up to 32 mA for the PXIe-657x, which adds PPMU capability
    • Register Write/Read
    • Extended Register Write/Read
    • Extended Register Write/Read Long
    • Support for half-speed data response (HSDR)
    • Support for configuring Time Domain Reflectometry (TDR) time constants and adjusting the protocol timing to support speeds higher than 3 MHz. You must provide the TDR time constraints.
    • Support for multiple devices—Allows two MIPI on completely different lines of an NI digital pattern instrument acting on two different buses with independent read and write on each bus.

    The Semiconductor Device Control Add-On does not support the following features of the MIPI® RFFE protocol:

    • Register 0 Write
    • Interrupt capabilities for slave devices
    • Multi-Master (M-M) operations