Learn how to use PXIe-1081 in PXI systems. Understand integration factors that affect performance, synchronization, and configuration workflows.

The chassis includes a high-speed PXI Express backplane. This backplane enables synchronized data transfer, timing coordination, and triggering across connected modules and systems. This architecture enables hybrid instrumentation setups with dynamic data exchange and precise timing control.

Backplane Architecture

The PXIe-1081 backplane includes two Gen1 x4 PCI Express switches and three PCIe-to-PCI bridges to support legacy PXI and CompactPCI modules. The chassis features:
  • Seventeen hybrid peripheral slots (slots 2–18) that accept PXI Express, CompactPCI Express, and modified PXI modules
  • One system controller slot (slot 1) with expansion capability and control over power and timing
  • Up to 250 MB/s bandwidth per PXI Express slot in a single direction
  • Up to 1 GB/s per link between the system controller and the backplane

Timing and Synchronization

The chassis generates and distributes three key timing signals from a common VCXO source:
  • PXI_CLK10: 10 MHz reference clock for PXI modules
  • PXIe_CLK100: 100 MHz reference clock for PXI Express modules
  • PXIe_SYNC100: Synchronization clock derived from PXIe_CLK100

Low-skew buffers distribute the clocks to each slot, maintaining phase alignment and minimizing jitter.

Trigger Routing

The PXIe-1081 supports both static and dynamic trigger routing:
  • PXI Trigger Bus: Eight shared lines with routing bridges between segments
  • Hardware Configuration Utility/MAX: Used to configure trigger reservations and routing
  • NI-DAQmx: Enables dynamic routing between modules and across chassis

Power and Cooling

The chassis accepts a universal AC input and works with region-specific power cables. Field-replaceable fans manage cooling and support multiple configurable modes.
  • Auto mode: Fan speed adjusts based on intake temperature
  • High mode: Fans run at full speed for maximum cooling

Slot blockers, standard filler panels, and EMC filler panels improve airflow and enhance shielding in PXI chassis. EMC filler panels specifically reduce electromagnetic interference (EMI). The front panel power button provides standard power control. A manual inhibit DIP switch offers an additional method for disabling power.

System Configuration

Using Hardware Configuration Utility or MAX and PXI Platform Services, you can:
  • View and configure chassis settings
  • Monitor voltages, temperatures, and fan speeds
  • Route triggers and manage inhibit/fan modes
  • Generate and manage system initialization files (pxisys.ini)

Maintenance and Serviceability

The PXIe-1081 is designed for easy maintenance. You can replace the rear and the side fan assemblies. Documented procedures guide interior and exterior chassis cleaning.