PXIe-1081 Trigger Bus

Learn how to share and route PXI trigger lines across bus segments in the PXIe-1081. Explore configuration options for static and dynamic routing.

Each PXI bus segment shares eight PXI trigger lines across its slots. These lines synchronize the operation of multiple PXI peripheral modules. Modules pass triggers to one another, enabling precisely timed responses to asynchronous external events that the system monitors or controls.

Buffered trigger bridges route trigger signals between adjacent PXI bus segments, enabling trigger communication across all slots in the chassis.

Static trigger routing lets users manually assign specific trigger lines and directions. You can configure this setup using Hardware Configuration Utility or MAX. Certain NI drivers, such as NI-DAQmx, support dynamic trigger routing, which automatically assigns trigger lines.

The PXI trigger bus routing diagram illustrates the distribution of eight PXI trigger lines across three bus segments. Trigger bridges buffer and route signals between segments, enabling synchronized triggering across all slots.

Figure 4. PXIe-1081 Trigger Bus Routing

Block diagram of the PXIe-1081 trigger bus system. It features three PXI Trigger Buses (#1, #2, and #3), each connected to six PXI slots. Two PXI Trigger Bridges (#1 and #2) link the buses, enabling signal routing across the chassis. Slots are numbered from 1 to 18, with some marked with an “H” to indicate high-priority or hybrid-capable slots. Arrows show the direction of trigger signal propagation within and between buses.