Luciano L. Mendes - Inatel
Henry D. Rodrigues - Inatel
Inatel, an engineering college located in Santa Rita do Sapucaí, Brazil, specializes in telecommunications, computers, control and automation, and bioengineering. Our main goal is to assure that we address the demands from Brazilian society in terms of communication infrastructure in the future standards. Today, our company is the main player in South America working in research and development of the fifth generation of wireless systems. 5G is considered the next revolution in communication. We need low latency and robustness for mission-critical applications such as distance medical surgery. The Internet of Things (IoT) will demand a multitude of devices, ranging from wearables and appliances to vehicles, be connected to the network. Remote and rural areas, which are not covered by any solution today, can benefit from a long-range 5G mode. This would enable Internet access for the people of these areas, but also enable connecting agriculture machinery to take advantage of being part of the IoT. Clearly, the 5G PHY must be flexible to address these challenging and sometimes conflicting requirements.
Inatel is driving the research of 5G for remote areas, a topic important not only for Brazil, but also for several countries with large territories that lack acceptable Internet coverage. The technologies available today cannot deliver reliable and economically feasible solutions for Internet access in remote areas.
The goal of our research is to include the remote area scenario as one operational mode for 5G networks to introduce cognitive radio capabilities associated with innovative waveforms and channel codes that can afford large coverage and low out-of-band emission, enabling the automatic selection and use of free spectrum in each specific area.
5G for remote areas includes two big challenges. The first one is technical. We need to develop a solution with high spectrum agility, using fragmented and dynamic spectrum allocation and large coverage (cell radius of 50 km or more). The peak data rate at the cell edge must be at least equal to 100 Mbps. The other challenge is the standardization, which means that we need to convince 3GPP, ITU, and other standardization groups that this solution is feasible. Inatel is working on these two activities in partnership with European and Brazilian institutes and companies.
The technical challenge is key to making 5G for remote areas commercially viable. It relies on licensed but vacant spectrum. We require cognitive capabilities to design the radio to discover that a spectrum slot became occupied by its primary owner and trigger the radio’s freeing of that slot. Besides this, the cell needs to have more than 50 km coverage to get a fair number of users and ensure that unused spectrum is not continuous for such a large area. We require low out-of-band emission to enable the use of several small, free spectrum slots that are not continuous. Without an innovative PHY that we can use to provide a reliable service and the proper standardization of the technology, we can’t deploy 5G for a remote area network.
This project consists of a PHY proposal for 5G for remote area applications. We used the GFDM modulation as waveform. We are developing channel estimation, synchronization, and coding based on multiple input, multiple output (MIMO) on this innovative waveform. We chose GFDM because cyclic prefix is more efficient compared with a widely adapted orthogonal frequency division multiplexing (OFDM), and also it has lower out-of-band leakage.
The biggest problem with this innovation is the hardware (development kits), which normally have limited functionality for communication and the necessary time to test an idea with the hardware in the loop. Universal software radio peripheral (USRP) devices combine an advanced RF front end with a large FPGA for digital signal processing (DSP). NI offers an integrated hardware and software solution for rapidly prototyping high-performance wireless transceiver systems. We started using NI because of the USRP devices, which have everything we need in a single box. Therefore, we do not need to worry about the hardware anymore and can focus on our contributions. In addition, we found the flexibility offered by the LabVIEW Communications System Design Suite of combining VHDL and software components running on the processor in a single environment appealing. Having a single interface where we can run blocks implemented in different programming tools (The MathWorks, Inc. MATLAB® software, C/C++, and VHDL) has also been useful. Our team includes several VHDL and Verilog specialists who used Altera and Xilinx platforms for VHDL development.
Validation Process From Simulation to Prototype
We validated our design in the following process. At first, we compare the normalized mean square error between the simulation design and the processor output, iterate until we receive satisfactory results, then move over the necessary blocks to FPGA on USRP for hardware-in-the-loop test to achieve the real-time operation.
We used tools in LabVIEW Communications to easily implement the process. The integration of these blocks is easy, and we don’t need to spend time converting blocks to test a given idea or solution. One important benefit we found was the ability to quickly test our ideas inside of the FPGA using the Multirate Diagram, a tool in LabVIEW Communications in which you can implement multirate, streaming DSP algorithms intuitively. Some blocks, which we developed in a low-level tool to program the FPGA, took several months to implement properly. Because of some modifications to our system, we had to redesign them. We chose to start from scratch using Multirate Diagram and finished in less than a week. So, using the Multirate Diagram was 10 to 20 times faster than low-level FPGA development.
Here are some examples of what we have done with each programming language:
- Multirate Diagram (high-level synthesis tool)—frequency domain channel estimation (power-of-two FFT, multiplication, IFFT, zero padding, non-power-of-two DFT), space-time block coding (STBC) combiner, non-power-of-two IDFT
- VHDL—rate adaption (insertion/removal of dummy bytes for keeping a constant rate), frame multiplexer (creation of a frame structure), STBC encoder, CP/CS insertion and windowing, resource mapper/demapper
- Graphical Clock-Driven Logic—GFDM modem, synchronization, digital predistortion linearization, top-level files
- Optimized FPGA VI (high-level synthesis tool)—SNR estimation and SISO equalizer
The transceiver runs entirely in the FPGA. We took advantage of the flexibility of using different languages in the same project to optimize our development and reuse code we already had.
We found the Multirate Diagram extremely useful. In addition, we used the tool for automated floating to fixed-point conversion from LabVIEW Communications to quickly achieve 57 dB (maximum) modulation error rate (MER) in the demodulator without spending a long time manually converting the code from floating point in simulation to fixed point to run on the FPGA. This is important for using a high-order constellation such as 256 QAM, for example.
The main benefits of our solution are that it:
- Provides a reference for future products and equipment development based on GFDM
- Delivers a solution for the GFDM performance evaluation in terms of BER, throughput, power and spectrum efficiencies, out-of-band emission, non-linear power amplifier, front-end impairments, and real channel conditions
- Demonstrates that the current technology can be used to close the connectivity gap in remote areas
- LabVIEW Communications and the USRP have offered a cohesive platform so that our development engineers could focus on algorithm implementation, without spending time developing custom hardware or adapting simulation code to run on hardware. The introduction of Multirate Diagram in this workflow has drastically reduced the development time, and the time from the idea to a block running inside the FPGA has dropped from a few months to weeks.
I believe we could have achieved the same results with other solutions, but it would have taken much more time. In our limited timeframe, we could not have achieved the results that we have without the LabVIEW Communications, USRP, and PXI combination.
We do not know of any other MIMO-GFDM system running entirely on hardware with high throughput and with all necessary PHY blocks (channel coding, channel estimation, synchronization, MIMO, frame structure, and more) implemented to run on an FPGA. We believe that the framework that we have today in LabVIEW Communications is a world-first reference design for GFDM transceivers.
Luciano L. Mendes