Arbitration—This device supports arbitration to determine which object can access the resource if
multiple objects request access at the same time. Configure the arbitration
settings for the channels of this device in the FPGA I/O
Properties dialog box for the FPGA I/O item you are using.
FPGA Base Clocks—This device supports FPGA base clocks. For more information about the available base clock
resources, refer to the PXI-795x Base Clocks topic.
Single-Cycle Timed Loop—This device supports the single-cycle Timed Loop for the implementation of
multiple clock domains in an FPGA VI.