Gets or sets whether this Feedback Node initializes if the FPGA VI resets. If TRUE, this node does not initialize if the FPGA VI resets. This node initializes the next time you download the FPGA VI to the FPGA target. This property applies only when the Feedback Node is deployed on an FPGA target. This property can have a value of TRUE only when the initialization style of the Feedback Node is to initialize on compile or load.

If you write a value of TRUE, ensure the application does not depend on the value this Feedback Node returns on the first call after resetting the FPGA VI.

Remarks

The following table lists the characteristics of this property.

Short Name IgnoreReset
Data type cbool.png
Permissions Read/Write
Available in Run-Time Engine Yes
Available in Real-Time Operating System Yes
Settable when the VI is running No
Loads the front panel into memory No
Need to authenticate before use No
Loads the block diagram into memory No
Remote access allowed Yes