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Last Modified: July 19, 2019

Indicates the number of edges of the digital signal that must occur for each iteration of the Timed Loop to execute.

Data type: datatype_icon

Long Name: Timing Source:Edge Count

Class: DAQmx Timing Source

Permissions: Read

Where This Property Is Available:

Desktop OS: Windows

FPGA: Not supported

Web Server: Not supported in VIs that run in a web application

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