Indicates the signal the timing source uses.
Data type:
Name | Value | Description |
---|---|---|
Sample Complete Event | 12530 | Timed Loop executes each time the Sample Complete Event occurs. |
Counter Output Event | 12494 | Timed Loop executes each time the Counter Output Event occurs. |
Change Detection Event | 12511 | Timed Loop executes each time the Change Detection Event occurs. |
Sample Clock | 12487 | Timed Loop executes on each active edge of the Sample Clock. |
Where This Property Is Available:
Desktop OS: Windows
FPGA: Not supported
Web Server: Not supported in VIs that run in a web application