Increase the efficiency of VeriStand by following best practices for your system definition, controllers, hardware, models, and reflective memory.

Streamlining the System Definition
Decrease the complexity of your system definition by removing unused hardware I/O channels, maximizing the Convert Clock rate for multiplex sampling DAQ devices, and using hardware timing.
Configuring the BIOS Settings of the Controller
Increase the performance of your real-time controller by enabling turbo boost and reducing the number of enabled cores.
Configuring the Ethernet Settings of the Controller
Increase the performance of your real-time controller by using line interrupt packet detection.
Optimizing Hardware Performance
Increase the performance of your VeriStand system by using hardware timing, simultaneous sampling, USB CAN devices, PXIe devices, and not using Real-Time Hypervisor.
Improving Model Performance
Increase model performance by consolidating small models and preallocating arrays for LabVIEW models.
Optimizing Reflective Memory
Improve the use of your reflective memory usage by reducing the dynamic data size, creating channel mappings between targets, and using data channels selectively with non-VeriStand systems.

Parent topic: Debugging the System

VeriStand User Manual