Decrease the complexity of your system definition by removing unused hardware I/O channels, maximizing the Convert Clock rate for multiplex sampling DAQ devices, and using hardware timing.

  1. Launch your project in the VeriStand Editor.
  2. In the Project Files pane, left-click a system definition file (.nivssdf) and select Configure in System Explorer.
  3. Depending on your goal, complete any of the following tasks.
    Goal Tasks Rationale
    Remove all unused hardware I/O channels.
    1. Click Targets » Controller » Hardware » Chassis » DAQ in the configuration tree.
    2. Select a DAQ device and delete any unused hardware I/O channels.
    		 Unused hardware resources slow performance. VeriStand must read and write every I/O channel in the system definition regardless of whether or not the system uses the channel data.
    Maximize the rate of the Convert Clock on DAQ devices that use multiplexed sampling.
    1. Click Targets » Controller » Hardware » Chassis » DAQ in the configuration tree.
    2. Click a DAQ device and, in the Conversion rate drop-down, select Maximum.
    Multiplexing can cause delays if the Convert Clock does not run fast enough. Changing the rate of the Convert Clock to maximum minimizes the delay. Relevant DAQ devices include the M Series, E Series, and some X Series.
    Note Using the maximum possible Convert Clock rate also reduces the accuracy of measurements.
    Use hardware timing instead of software timing.
    1. Click Targets » Controller in the configuration tree.
    2. In the Primary Control Loop timing source drop-down, select Automatic.
    3. Click Hardware » Chassis in the configuration tree.
    4. In the Chassis master hardware synchronization device drop-down, select DAQ or FPGA.

    With hardware timing, a digital signal, such as a clock on your device, controls the rate at which signals are generated.

    With software timing, the software and operating system controls the rate instead of the measurement device. A hardware clock can run faster—and is more accurate—than a software loop.
  4. Save the system definition file.