Board IO FPGA I/O Items and Status Items
- Updated2023-02-20
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Board IO FPGA I/O Items and Status Items
You can use an FPGA I/O Node, configured for reading and writing, with your FlexRIO Modular I/O Controller. The FPGA I/O Node is located on the FPGA I/O Functions palette and performs specific FPGA I/O operations on your FPGA target.
The IO Module Status terminals are synchronous to the 40 MHz clock, and they should be accessed through that clock domain.
You can select the following FPGA I/O items for the device.
| FPGA I/O Item | Description |
|---|---|
| Clock100 PLL Unlocked | Indicates if the PLL that generates the 40 MHz, 100 MHz, and 200 MHz base clocks has unlocked
after the FPGA bitfile downloads. After the FPGA bitfile downloads,
the PLL locks to the 100 MHz clock
generated by the PLL on the baseboard. If the PLL becomes unlocked,
then the FPGA attempts to relock the PLL to the 100 MHz oscillator. Refer to the
device user manual for more information about the device clocking
architecture. Note NI recommends
that you reload the FPGA bitfile if the Clock100 PLL Unlocked
status is TRUE. Xilinx does not guarantee proper PLL operation
in these cases, and undesired behavior may occur.
|
| FPGA I/O Item | Description |
|---|---|
| EEPROM Power Enabled |
TRUE = Indicates that the adapter module EEPROM power rail is enabled. FALSE = Indicates that the adapter module EEPROM power rail is not enabled. |
| Expected IO Module ID |
Reports the unique 32-bit IO Module ID that the currently downloaded FPGA VI is configured to use. The inserted IO Module ID must match the expected IO Module ID so the adapter module can function properly. The Expected IO Module ID is configured by choosing the appropriate adapter module in the IO Module General Properties dialog box and then recompiling and redownloading the FPGA VI. |
| Inserted IO Module ID |
Reports the unique 32-bit IO module ID of the currently inserted adapter module. The Inserted IO Module ID must match the expected IO Module ID for the adapter module to function properly. |
| IO Module IO Enabled |
TRUE = Indicates that the adapter module connector FPGA I/O pins are enabled. FALSE = Indicates that the adapter module connector FPGA I/O pins are not enabled. Note These pins are
enabled only when an adapter module is connected, properly
powered, and when the FPGA has determined that the connected
adapter module is compatible with the FPGA VI currently
downloaded to the FPGA.
|
| IO Module Power Enabled |
TRUE = Indicates that the adapter module power is fully enabled. FALSE = Indicates that the adapter module power is not enabled. Note Adapter module
power is enabled only when an adapter module is connected and
the FPGA has determined that the connected adapter module is
compatible with the program currently downloaded to the FPGA.
|
| IO Module Power Good |
Reports the state of the power good signal on the adapter module connector interface. TRUE = Indicates that the connected adapter module power rails have had the proper amount of time to initialize and are operational and stable. FALSE = Indicates that the connected adapter module power rails are not ready. |
| IO Module Present |
TRUE = Indicates that an adapter module is physically connected to the FPGA module. FALSE = Indicates that an adapter module is not connected to the FPGA module. |
Invoke Method Functions
You can also use an Invoke Method function to invoke an action from the host VI to the FPGA VI your FlexRIO Modular I/O Controller. The host VI is available from the LabVIEW FPGA host interface. The Invoke Method function is located on the FPGA Interface VIs and Functions palette.
In addition to the standard methods supported by the LabVIEW FPGA Module, FlexRIO targets also support the following custom FPGA Invoke methods.
| Interface Methods | Description |
|---|---|
| Control IO Module Power |
Enables or disables power to the connected adapter module. You must physically insert an adapter module into the FPGA module to run this method. Enabled TRUE = Enables power to the adapter module. FALSE = Disables power to the adapter module. |
| IO Module Status |
Queries status information about the FlexRIO adapter module interface. You do not need to physically insert an adapter module in the FlexRIO system to run this method. IO Module Present? TRUE = Indicates that an adapter module is physically inserted in the FlexRIO system. FALSE = Indicates that no adapter module is inserted. Power Enabled? TRUE = Indicates that power to the adapter module is enabled. FALSE = Indicates that power to the adapter module is disabled. I/O Enabled? TRUE = Indicates that FPGA GPIO pin buffers on the adapter module interface are enabled. FALSE = Indicates that FPGA GPIO pin buffers are disabled. IO Module Mismatch? TRUE = Indicates that the currently downloaded FPGA VI is expecting to use a different adapter module than that which is currently inserted. In this case, power and I/O to the adapter module is disabled. To use the currently inserted adapter module with your FPGA program, configure your LabVIEW project to use the currently inserted adapter module, recompile your VI, and redownload it to the FPGA. FALSE = Indicates that the currently downloaded FPGA VI is compatible with the current adapter module. |
| Redetect IO Module |
Redetects the adapter module that is currently connected to the FlexRIO FPGA module. You must physically insert an adapter module in the FlexRIO FPGA module to run this method. Note This method is
only necessary when creating a custom adapter module.
|