Performs a hard reset on the device.

On the PXI-5600, if you are driving the PXI_CLK10 line, you continue to drive the clock even after a device reset. To stop driving the PXI_CLK10 line, use the niRFSA Configure PXI Chassis Clk10 VI and set the PXI Clk10 source input to None or set the PXI Chassis Clk10 Source property to None.

Refer to the Power On and Reset Conditions topic for your device for more information about the hardware state after performing a device reset.

Supported Devices: PXI-5600, PXIe-5601/5603/5605/5606 (external digitizer mode), PXI-5661, PXIe-5663/5663E/5665/5667/5668, PXIe-5693/5694/5698


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Inputs/Outputs

  • civrn.png instrument handle —

    instrument handle identifies your instrument session. instrument handle is obtained from the niRFSA Initialize VI or the niRFSA Initialize With Options VI.

  • cerrcodeclst.png error in —

    error in describes error conditions that occur before this node runs. This input provides standard error in functionality.

  • iivrn.png instrument handle out —

    instrument handle out passes a reference to your instrument session to the next VI. instrument handle is obtained from the niRFSA Initialize VI or the niRFSA Initialize With Options VI and identifies a particular instrument session.

  • ierrcodeclst.png error out —

    error out contains error information. This output provides standard error out functionality.

    • Details

    A hard reset consists of the following actions:

    • Signal acquisition is stopped.
    • All routes are released.
    • External bidirectional terminals are tristated.
    • FPGAs are reset.
    • Hardware is configured to its default state.
    • All session properties are reset to their default states.

    During a device reset, routes of signals between this and other devices are released, regardless of which device created the route. For example, a trigger signal exported to a PXI trigger line that is used by another device is no longer exported.