Synchronous Sampling

Synchronous sampling is a key feature of the data acquisition system for acquiring dynamic signals. Traditionally, you implement synchronous sampling by using simultaneous sample-and-hold circuitry.

The following different types of timing can exist between I/O channels:

  • Perfect, shared timing and triggering in order to achieve zero interchannel sampling delay.
  • Deterministic timing and triggering to achieve a deterministic nonzero interchannel sampling delay.
  • Shared, non-deterministic triggering and/or independent timing in which the separate clocks are not phase-locked.
  • Independent subsystems with free-running timing and separate triggers.

For non-deterministic delays, you can use the common features in the data to measure sampling delay between channels at each feature. For deterministic delays, you can compensate the data to measure event timing and system response. You can compensate for deterministic delay by adjusting the timing, such as post-trigger delay, signal conditioning through an all-pass filter, or even scaling the measured phase responses directly. Depending on the test signal, you can express this delay in a number of different units: time (s), samples, and phase (deg). The following equation describes the conversions between these common delay units:

time = samples/sampling rate = phase /(360 * frequency)

where time is in seconds, sampling rate is in hertz, phase is in degrees, and frequency is in hertz. The following figure demonstrates the relationships among these units.

Figure 8. Relationship Between Different Delay Units

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In the previous figure, the delay time is 0.01 seconds, which equals to 10 samples/1000 (samples/s) and 90 deg/(360 deg * 25 Hz).