After you add a DSP48E or DSP48E1 function to the block diagram, LabVIEW shows only the a, b, c, and p terminals, where p is the output of the function and the other terminals are inputs. However, you can choose to show other terminals.

Use the Terminals page of the configuration dialog box to specify which block diagram terminals LabVIEW shows. The following illustrations show the names and data types of all terminals for both functions.

All numeric terminals are fixed-point. The previous illustration shows the encodings, word lengths, and integer word lengths of these terminals. If you hide these terminals, LabVIEW sets them to 0. These terminals do not adapt to source: if you wire a fixed-point control or indicator with a different data type to a terminal, LabVIEW coerces the value, which reduces precision. To retain precision, either wire a value with the same data type as the terminal or adjust the integer word length of the terminal.

Note Pay attention to the caveats when wiring certain output terminals.

The other terminals are Booleans. If you hide these terminals, LabVIEW sets them to FALSE. You can show the patterndetect and patternbdetect terminals only if you enable pattern detection. You can show the overflow and underflow terminals only if you also enable registers for p.

If you show an input terminal, such as c, the corresponding VHDL is C => C. If you use this VHDL code elsewhere, you must replace the C on the right side of the port association with the name of the signal that drives the c input. If you hide the terminal, both LabVIEW and the VHDL set the value of c to a constant 0.

If you show an output terminal, such as overflow, the corresponding VHDL code is OVERFLOW => OVERFLOW. If you use this VHDL code elsewhere, you must replace the signal name on the right side of the port association to the name of the signal OVERFLOW drives. If you hide the terminal, the VHDL code is OVERFLOW => OPEN.

Note Refer to the "Input Ports" and "Output Ports" sections of the Virtex-5 FPGA XtremeDSP Design Considerations User Guide, available on the Xilinx Web site at www.xilinx.com, for information about function inputs and outputs. (DSP48E1) Refer to these sections of the Virtex-6 FPGA DSP48E1 Slice User Guide for information about the inputs and outputs that are available only with the DSP48E1 function.

Cascading or Hiding the a and b Input Terminals

Use the Terminals to Show section of the Terminals page to cascade or hide the a and/or b input terminals. The following illustration shows this section:

Use this section to complete the following tasks:

  • To set a terminal to cascade mode, select the acin or bcin option, respectively. The function then displays acin or bcin terminals instead of a or b. You must wire acin and bcin to the acout or bcout output terminals from another DSP48E or DSP48E1 function.
    Note The acin input terminal has the same data type as the a input terminal. The bcin terminal has the same data type as the b input terminal. The word lengths of these terminals are fixed, but you can adjust the integer word lengths to retain precision.
  • To set a terminal to direct mode, select the a or b option, respectively.
  • If you are not using a terminal, hide it by selecting its Hide both option.

Refer to the Virtex-5 FPGA XtremeDSP Design Considerations User Guide and the Virtex-6 FPGA DSP48E1 Slice User Guide, available on the Xilinx Web site at www.xilinx.com, for information about cascading and its implications for DSP48E and DSP48E1 slices.

VHDL Equivalent of LabVIEW Options

To view the VHDL equivalent of a configuration, click the VHDL Instantiation tab. Refer to Table 1-3 in either the Virtex-5 FPGA XtremeDSP Design Considerations User Guide or the Virtex-6 FPGA DSP48E1 Slice User Guide, available on the Xilinx Web site at www.xilinx.com, for information about specific attributes. The following table shows the attributes that correspond to each option in LabVIEW.

LabVIEW Option Attribute to Reference in Table 1-3

A_INPUT

B_INPUT
Note The VHDL for the b and bcin terminals is similar, except the generics are B_INPUT, B, and BCIN.