Software Requirements

• MATLAB Simulink^® with HDL Coder license (r2020a or above)
• For LabVIEW and driver version requirements, refer to the IP to FPGA Conversion Utility Compatibility table in Installation Instructions.

Steps

To convert Simulink models to bitfiles, complete the following steps.

1. Open the model you want to convert to an NI FPGA bitfile in Simulink.
   Note For Simscape models, use the Simscape HDL Workflow Advisor to convert an existing model to a Simulink HDL Implementation model.
2. Navigate to the Configuration Parameters window.
   Note For more information on the Simulink environment, refer to their documentation.
3. In the navigation pane, click HDL Coder Generation.
4. Set the Language to VHDL.
   Note Verilog is not supported.
5. Set the Folder where Simulink will generate the VHDL code.
6. Click Run Compatibility Checker to confirm the model compatibility.
   
   
   
   
7. In the navigation pane under HDL Code Generation, click Target and enter a Target Frequency (MHz).
   
   
   
   
8. (Optional): If your model has an array or complex ports, in the navigation pane, click Global Settings and set Scalarize ports to on.
   
   
   
   
9. Save the model (.slx) and generate the HDL code.
10. Ensure that all LabVIEW and LabVIEW FPGA licenses are activated on the machine you are running the IP to FPGA Conversion Utility.
    Note You can skip this step during subsequent bitfile conversions.
11. Open the Command Line and enter ip2fpgaCLI.exe.
12. Enter the create-config command to create a configurations template file.
    Note For more information on the create-config command, refer to the Commands Table.
    Note When running this command for the first time in LabVIEW 2021 and later, the Security Warning: Run When Opened dialog box opens. Enable Remember this choice in the permission list and click Run.
13. (Optional): To have the configuration template file map the model ports to Board I/Os, refer to Modifying Configuration Template File. By default, model ports map to registers.
14. Open LabVIEW and select the Compile Server option from Tools >> Options. You can skip this step during subsequent bitfile conversions. For more information on compiling options, refer to NI LabVIEW FPGA Compilation Options.
    
    
    
    
15. Enter the build-bitfile command to generate the bitfile. Using this command causes the IP to FPGA Conversion Utility to display information in the command line output. This information includes the created LabVIEW Project Path, Data Ports table, Estimated Device Utilization, Final Device Utilization, Bitfile Path, and more.
    Note For more information on the build-bitfile command, refer to the Commands Table.