This particular reference design is for the NI sbRIO-9605/9606 boards, the design files are provided as a template so you can begin completing your RIO Mezzanine Cards with Multisim and Ultiboard.
Click here to download a zip file with all the design files.
The zip file contains:
- Multisim file: sbRIO-9605_9606 Daughter Card.ms12
- Ultiboard file: sbRIO-9605_9606 Daughter Card.ewprj
- Netlist file: sbRIO-9605_9606 Daughter Card.ewnet
You need to have Circuit Design Suite (Multisim and Ultiboard) version 12.0 installed to open these files. Visit ni.com/multisim to download an evaluation version.
The custom board on this reference design contains a triple axis digital accelerometer, a 20x4 character LCD screen, a USB port, and some passive components. LabVIEW Real-Time and LabVIEW FPGA are used to define the operation of the sbRIO system. The application running on the FPGA will acquire acceleration from the accelerometer through Serial Peripheral Interface (SPI) bus. This information will be used to determine the position of the text on the LCD. This means that whenever the board is tilted, the text on the screen will move in the direction of tilt, at a speed proportional to the angle of tilt. Please note that discussing the LabVIEW code is beyond the scope of this reference design.
Sixteen FPGA I/O lines are used to control the digital accelerometer and the LCD screen. Table 1 shows the mapping between these components and the FPGA I/O lines.
Table 1. FPGA I/O lines used on the reference design
|Component||Pin||FPGA I/O Line|
Since the FPGA I/Os are 3.3V, it is recommended that you use 3.3V logic components. Higher voltage components can be used as long as they do not directly communicate with the FPGA I/Os, as this will damage the latter. Voltage level buffers can be used to go from 5V to 3.3V and vice versa. Buffering methods and device selection will be dependent on design needs, and will not be discussed in this document.
Although this design reference library is intended to be as accurate as possible and has been checked by Application Engineers at NI, it is always recommended to closely check documentation provided with the hardware purchase. It is always suggested that you reference materials associated with NI hardware to verify correct pin assignments and to check correct layout guidelines and pin spacing.