This document contains the NI VeriStand 2015 known issues that were discovered before and since the release of NI VeriStand 2015. Not every issue known to NI will appear on this list; it is intended to only show the severe and more common issues that can be encountered.
The following items are known issues in NI VeriStand 2015 sorted by Date.
| ID | Known Issue | |||||
|---|---|---|---|---|---|---|
| 317883 Return | Using % in a block name causes a The MathWorks Inc. Simulink® model to fail to build Using % in a block name causes a The MathWorks Inc. Simulink® model to fail to build Workaround: Do not use % in the block name.
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| 383092 Return | Streaming a large number of waveform graphs can cause VeriStand gateway to stop responding Streaming a large number of waveforms to the waveform graph can cause the VeriStand gateway to be overwhelmed and stop responding in a timely fashion. Workaround: Reduce CPU usage on the gateway computer or stream fewer waveforms.
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| 386381 Return | The Pulse Measurement task may return incorrect data In certain configurations where the signal is disconnected or has a 0/100% duty cycle, the Pulse Measurement task may report invalid readings. The returned reading of the disconnected signal will be the last non 0/100% duty cycle processed by your device. Workaround: Install NI DAQmx 9.7 drivers
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| 392092 Return | Error -200452 occurs when a 433x device uses hardware timed single point If a 433x device is set as the master or if there is only a 433x device in a system definition, using hardware timed single point will cause error -200452 to occur during deployment. Workaround: Use at least one other device in the system definition
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| 402293 Return | Model files imported to VeriStand with vector channels appear as Nx1 rather than 1xN Model files imported to VeriStand with vector channels appear as Nx1 rather than 1xN making it impossible to map to the channel correctly. Workaround: Use the channel mappings dialog to import from a text file instead of using the dialog.
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| 519117 Return | Unmapped aliases can unexpectedly report the Actual Loop Rate If an alias remains unmapped when a VeriStand system is deployed, that unmapped alias can unexpectedly report values from the Actual Loop Rate system channel. Workaround: Map all aliases before deploying the System Definition.
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| 522678 Return | Adding an FPGA target to the System Definition via the API will fail to add the Parameters section of PWM channels When using the System Definition API to programmatically add an FPGA target to a System Definition file, the Parameters section typically included with PWM channels is excluded. Workaround: Add the FPGA manually to the System Definition via the System Explorer.
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| 372874 Return | Building a LabVIEW model for NI VeriStand fails if the controls or indicators have identical names. When building a VI into a model for NI VeriStand, the build process will fail if any of the indicators or controls have identical names. Workaround: Use different names for the controls and indicators that will become the model's inports and outports.
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| 542447 Return | System Definitions with multiple models fail to deploy to NI Linux Real-Time targets. Deployment of a VeriStand project to a NI Linux Real-Time target will fail when more than one model is included in the System Definition. The target will need to be restarted before other deployments will succeed. Workaround: Install the VeriStand 2015 f1 patch.
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The following items are known issues in NI VeriStand 2015 sorted by Category.
| ID | Known Issue | |||||
|---|---|---|---|---|---|---|
| Miscellaneous | ||||||
| 386381 Return | The Pulse Measurement task may return incorrect data In certain configurations where the signal is disconnected or has a 0/100% duty cycle, the Pulse Measurement task may report invalid readings. The returned reading of the disconnected signal will be the last non 0/100% duty cycle processed by your device. Workaround: Install NI DAQmx 9.7 drivers
| |||||
| 392092 Return | Error -200452 occurs when a 433x device uses hardware timed single point If a 433x device is set as the master or if there is only a 433x device in a system definition, using hardware timed single point will cause error -200452 to occur during deployment. Workaround: Use at least one other device in the system definition
| |||||
| Model Interfacing | ||||||
| 317883 Return | Using % in a block name causes a The MathWorks Inc. Simulink® model to fail to build Using % in a block name causes a The MathWorks Inc. Simulink® model to fail to build Workaround: Do not use % in the block name.
| |||||
| 402293 Return | Model files imported to VeriStand with vector channels appear as Nx1 rather than 1xN Model files imported to VeriStand with vector channels appear as Nx1 rather than 1xN making it impossible to map to the channel correctly. Workaround: Use the channel mappings dialog to import from a text file instead of using the dialog.
| |||||
| 372874 Return | Building a LabVIEW model for NI VeriStand fails if the controls or indicators have identical names. When building a VI into a model for NI VeriStand, the build process will fail if any of the indicators or controls have identical names. Workaround: Use different names for the controls and indicators that will become the model's inports and outports.
| |||||
| 542447 Return | System Definitions with multiple models fail to deploy to NI Linux Real-Time targets. Deployment of a VeriStand project to a NI Linux Real-Time target will fail when more than one model is included in the System Definition. The target will need to be restarted before other deployments will succeed. Workaround: Install the VeriStand 2015 f1 patch.
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| Performance | ||||||
| 383092 Return | Streaming a large number of waveform graphs can cause VeriStand gateway to stop responding Streaming a large number of waveforms to the waveform graph can cause the VeriStand gateway to be overwhelmed and stop responding in a timely fashion. Workaround: Reduce CPU usage on the gateway computer or stream fewer waveforms.
| |||||
| System Explorer | ||||||
| 519117 Return | Unmapped aliases can unexpectedly report the Actual Loop Rate If an alias remains unmapped when a VeriStand system is deployed, that unmapped alias can unexpectedly report values from the Actual Loop Rate system channel. Workaround: Map all aliases before deploying the System Definition.
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| Using the API | ||||||
| 522678 Return | Adding an FPGA target to the System Definition via the API will fail to add the Parameters section of PWM channels When using the System Definition API to programmatically add an FPGA target to a System Definition file, the Parameters section typically included with PWM channels is excluded. Workaround: Add the FPGA manually to the System Definition via the System Explorer.
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