The top-level RTG Coprocessor Template VI is a good starting point for creating a custom coprocessor application. It provides everything required to interface with the RTG and user-defined functionality can be easily added to the diagram. The major components are as follows.

Note The template instantiates both IQ data and target streaming IPs. The IPs are decoupled from one another, so one IP could be removed from the design without affecting the other.

IFW Interface

Instructions for the IQ data and target streaming are sent from the host and consumed here. Each provides its own communication pipe to allow flexibility in how the pipes are constructed and utilized within the application.

Figure 41. IFW Interface

IQ Data Streaming

Data comes from the VST through the Read Data Stream VI. After the read, any custom IQ data processing can occur as depicted in the figure below, in the box labeled >> Customize RTG IQ Data Streaming Here >>. This data processing must meet the following criteria:

  • Capable of processing multiple samples per clock cycle (SPC) (8 for VST2 or 16 for VST3)
  • Capable of handling clocks where there is not valid data
  • Receives an input valid signal
  • Generates an output valid signal
Figure 42. Data Processing

Input Trigger Processing

Triggers can be shared between different devices. This example shows how to read a trigger generated from another device (such as RTG VST). The physical trigger source will be configured by the host.

Figure 43. Input Trigger Processing
To drive the PXI trigger line from the RTG VST, reference Using the Configuration Utility.
  • Section: <Instrument Name>
  • Key: <pxi_trigger_output>

Target Streaming

Target configurations can be generated from a variety of sources. Target configurations come from an arbitrary source, are processed as needed, and are then reformatted to match the RTG requirements. Finally, they are transferred to the RTG VST via a P2P stream. Target streaming processing can occur as depicted in the figure below, in the box labeled >> Customize RTG Target Streaming Here>>. This data processing must meet the following criteria:

  • Capable of processing multiple target configurations
  • Capable of handling clocks where there is not valid data
  • 4-wire handshaking
  • Receives an input valid signal
  • Generates an output valid signal
Figure 44. Target Streaming

Data Path Enable

Front panel controls and indicators can be used in conjunction with the IFW to communicate with FPGA. This an example of using a front panel control to replace the data path with all 0’s when data path is disabled.

Figure 45. Data Path Disabled
Note This code snippet is from the IQ Data Streaming section.