Runs the FPGA VI on the FPGA target. If the FPGA VI is already running on the FPGA target, the Run method does nothing unless the Wait Until Done input is set to TRUE.

Use the Invoke Method function to implement this method.

Note If you enable the removal of implicit enable signals from single-cycle Timed Loops, you must re-download the VI before rerunning it after the first run.
Option Description
FPGA VI Reference In FPGA VI Reference In is a reference to an FPGA VI. You must open a reference to the FPGA VI to use this parameter.
error in error in describes error conditions that occur before this node runs. This input provides standard error in functionality.
Wait Until Done (F) Wait Until Done makes the Invoke Method function wait until the FPGA VI finishes running. If you set this parameter to TRUE, make sure the FPGA VI terminates execution on its own. The default is FALSE.
FPGA VI Reference Out FPGA VI Reference Out returns a reference to an FPGA VI.
error out error out contains error information. This output provides standard error out functionality.