Opening a Reference to an FPGA VI, Build Specification, or Bitfile
- Updated2025-09-18
- 4 minute(s) read
Opening a Reference to an FPGA VI, Build Specification, or Bitfile
You can communicate with FPGA VIs or bitfiles running on FPGA targets using host VIs. Host VIs can run on PCs or RT targets. Each host VI must open a reference to the FPGA VI, build specification, or bitfile that runs on the FPGA target. You can open a reference to any FPGA VI or build specification that is part of the same LabVIEW project as the host VI. You can open a reference to any bitfile inside or outside the project.
The FPGA target, FPGA VI, and host VI must be in the same LabVIEW project if you want to open a reference to an FPGA VI. The host VI does not need to be in a project if you open a reference to a bitfile.
Opening a Reference to an FPGA VI or Build Specification
Complete the following steps to open a reference to an FPGA VI or build specification in a host VI. You can open a reference if the host VI, FPGA target, FPGA VI, and build specification are in the same project. You cannot open a reference to an FPGA VI or build specification if you do not have the LabVIEW FPGA Module installed.
- Create a new project or open an existing project.
- Add an FPGA target to the project or verify the FPGA target appears in the Project Explorer window.
- Create a new FPGA VI or verify the FPGA VI to which you want to open a reference appears in the Project Explorer window under the FPGA target.
- Create a new host VI or open an existing host VI in the project. The host VI must be under My Computer or an RT target in the Project Explorer window.
- Add an Open FPGA VI Reference function to the block diagram.
- (Optional) Drag the FPGA VI you want to open a reference to from the Project Explorer window to the Open FPGA VI Reference function. The FPGA VI icon appears in the Open FPGA VI Reference function. If the FPGA target in the project is associated with a physical target, the target name and resource appears under the Open FPGA VI Reference function.
- (Optional) Right-click the Open FPGA VI Reference function and select Configure Open FPGA VI Reference from the shortcut menu to display the Configure Open FPGA VI Reference dialog box, which you can use to select a build specification and other options for opening the reference.
- (Optional) Wire a control or constant to the resource name input on the Open FPGA VI Reference function to specify an FPGA target on which to run the FPGA VI.
Opening a Reference to a Bitfile
Complete the following steps to open a reference to a bitfile in a host VI. The host VI does not need to be in a project. If your application requires a reference to a bitfile at run time, wire an Open Dynamic Bitfile Reference function in place of the Open FPGA VI Reference function.
- Create a new host VI or open an existing host VI. If the host VI is in a project, the host VI must be under My Computer or an RT target in the Project Explorer window.
- Add an Open FPGA VI Reference function to the block diagram.
- Right-click the Open FPGA VI Reference function and select Configure Open FPGA VI Reference from the shortcut menu.
- Select the Bitfile option in the Configure Open FPGA VI Reference dialog box.
- Navigate to the bitfile you want to open on an FPGA target.
- (Optional) Use the Configure Open FPGA VI Reference dialog box to select additional options for opening the reference.
- Click the OK button. The FPGA VI icon appears in the Open FPGA VI Reference function. A folder icon appears in the upper left corner of the Open FPGA VI Reference function to denote the bitfile.
- Wire a control or constant to the resource name input on the Open FPGA VI Reference function to specify an FPGA target on which to run the FPGA VI.
Related Information
- Downloading an FPGA VI to an FPGA Target
- Using Multiple FPGA VI References for the Same Target
- Reading DMA FIFOs from Host VIs
- Reading FPGA VI Indicators
- Synchronizing FPGA VIs and Host VIs Using Interrupts
- Using LabVIEW FPGA Interface without the FPGA Module
- Writing to DMA FIFOs from Host VIs
- Writing to FPGA VI Controls