High Throughput Divide
- Updated2025-01-28
- 7 minute(s) read
Computes the quotient of x and y. This function rounds the result by truncating the value of the x/y output terminal towards 0.
This function supports only scalar values of integer and fixed-point data types.

Dialog Box Options
| Parameter | Description |
|---|---|
| Fixed-Point Configuration | Specifies the encodings, word lengths, and integer word lengths of the input and output terminals of this function. The configurations you specify determine the value range of the terminals.
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| Execution Mode | Specifies how this function executes.
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| Registers | Specifies whether to add internal registers for function inputs and/or outputs. These registers will be placed outside of any embedded resources, such as block multipliers or DSP48E slices. This section is available only if you select Inside single-cycle Timed Loop.
Note Adding registers can reduce the length of the combinatorial path, which can prevent compilation errors that result from a long combinatorial path. However, adding registers also increases the latency of this function, which means this function takes additional clock cycles to return a valid result.
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| Optional Terminal | Specifies a setting for displaying an optional block diagram terminal.
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| Configuration Feedback | Displays information about how this function executes. This information is based on the configuration options you specify. |
Inputs/Outputs
x
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Specifies the dividend.
y
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Specifies the divisor. If the value of y is 0, overflow occurs in the x/y output terminal. Specifies whether the next data point has arrived for processing. Wire the output valid output of an upstream node to this input valid to transfer data from the upstream node to this Express VI. To display this handshaking terminal, select the Inside single-cycle Timed Loop in the configuration dialog box. Specifies whether downstream nodes are ready for this Express VI to return a new value. The default is TRUE. Use a Feedback Node to wire the ready for input of a downstream node to ready for output of the current node. Note If ready for output is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.
To displayready for output, select the Inside single-cycle Timed Loop in the configuration dialog box.
x/y
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Returns x divided by y. Returns TRUE if the theoretical computed value exceeds the valid range of the output data type. If operation overflow returns TRUE, the Overflow mode option determines the value this function returns. LabVIEW displays the operation overflow terminal only if you place a checkmark in the Operation overflow checkbox. This checkbox is located in the Optional Terminal section of the configuration dialog box. Returns TRUE if this node has computed a result that downstream nodes can use. Use output valid for handshaking with other FPGA VIs and functions. To display this terminal, select the Inside single-cycle Timed Loop in the configuration dialog box. Returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire ready for input to ready for output of an upstream node. Note If ready for input returns FALSE during a given cycle, LabVIEW discards any data that other nodes send to this node during the following cycle. LabVIEW discards this data even if the input valid terminal is TRUE during the following cycle.
To display ready for input, select the Inside single-cycle Timed Loop in the configuration dialog box. |
If you place a checkmark in the Adapt to source checkbox, overflow still can occur in the x/y output terminal for non-zero values of y if both of the following conditions are true:
- x = –2iwlx – 1
- y = –2iwly – wly
where wl refers to the word length of a terminal and iwl refers to the integer word length of a terminal.
Complete the following steps to avoid overflow in this situation and for any non-zero value of y.
- Remove the checkmark from the Adapt to source checkbox.
- Increase both the Word length and Integer word length of the x/y terminal by at least 1 bit.
After you complete these steps, LabVIEW does not adjust the fixed-point configuration of the x/y terminal automatically. If you change the fixed-point configuration of the x or y terminal and still want to avoid overflow for any non-zero value of y, place a checkmark in the Adapt to source checkbox again. LabVIEW adjusts the fixed-point configuration of the x/y terminal automatically. Then, complete steps 1–2 above to ensure that no overflow occurs with the updated fixed-point configurations.
Examples
Refer to the following example files included with LabVIEW FPGA Module.
- labview\examples\CompactRIO\FPGA Fundamentals\FPGA Math and Analysis\High-Throughput Math\Divide\Divide.lvproj
- labview\examples\CompactRIO\FPGA Fundamentals\FPGA Math and Analysis\High-Throughput Math\Vector Normalization\Vector Normalization.lvproj
- labview\examples\R Series\FPGA Fundamentals\FPGA Math and Analysis\High-Throughput Math\Vector Normalization\Vector Normalization.lvproj
x
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x/y
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