Adv Timing
- Updated2023-02-21
- 1 minute(s) read
Installed With: NI-HSDIO
Use the Adv Timing VIs to configure advanced timing features.
| Palette Object | Description |
|---|---|
| niHSDIO Adjust Sample Clock Relative Delay |
Delays the Sample clock relative to the Reference clock. Use this VI to align the Sample clock of your device with the Sample clock of another device in your system. The adjustment takes effect immediately. Call this VI only after your session is committed. |
| niHSDIO Configure Ref Clock |
Configures the Reference clock. Use this VI when you are using the On Board Clock as a Sample clock and you want the Sample clock to be phase-locked to a reference signal. Phase-locking the Sample clock to a Reference clock prevents the Sample clock from losing alignment with the Reference clock. The driver ignores the Reference clock rate input when the Reference clock source is PXI Clock. |