NI Multifunction Reconfigurable I/O (R Series) devices and modules may have analog input, analog output, or a mix of both systems. There are specifications unique to each subsystem, but also some specifications which apply to both. This section is organized in three sections to cover the common specifications, analog input specific, and analog output specific.
Analog Input and Analog Output
Absolute Accuracy at Full Scale
Accuracy refers to how close to the correct value of a measurement is. Absolute Accuracy at Full Scale is a calculated theoretical accuracy assuming the value being measured is the maximum voltage supported in a given range. The accuracy of a measurement will change as the measurement changes, so to be able to make a comparison between devices, the accuracy at full scale is used. Note that absolute accuracy at full scale makes assumptions about environment variables, such as 25 °C operating temperature, that may be different in practice.
- Residual Gain Error—Gain error inherent to the instrumentation amplifier and is known to exist after a self-calibration
- Gain Tempco—The temperature coefficient that describes how temperature impacts the gain of the amplifier compared to the temperature at last self-calibration
- Reference Tempco—The temperature coefficient that describes how accurate a measurement is at a specific temperature compared to the temperature at last external calibration
- Residual Offset Error—Offset error inherent to the instrumentation amplifier and is known to exist after a self-calibration
- Offset Tempco—The temperature coefficient that describes how temperature affects the offset in an ADC conversion compared to the temperature at last self-calibration
- INL Error (relative accuracy resolution)—The maximum deviation from the voltage output of an ADC to the ideal output. Can be thought of as worst case DNL. See also: DNL
- Random/System Noise—Additional system noise generated by the analog front end, measured by grounding the input channel
The NI PXIe-7847R has a range of ± 10 V. The absolute accuracy at full scale (calibrated) is calculated with the assumption that the signal being measured is 10 V. The absolute accuracy at full scale for the ± 10 V range is 2,283 µV.
How Do I Calculate Absolute Accuracy Or System Accuracy?
Resolution is the smallest amount of input signal change that a device or sensor can detect. The number of bits used to represent an analog signal determines the resolution of the ADC.
The NI PXIe-7847R is a 16-bit device, which means that lowest amplitude change that can be detected on the ±5 V range is 0.152 mV. On the ± 1 V range, this value is 30.5 µV.
For analog input, this is the maximum positive and negative value that can be measured with guaranteed accuracy. For analog output, this is the maximum positive or negative value that can be generated. Some devices have multiple input or output ranges that can be used to provide a higher resolution at lower level signals.
The NI PXIe-7847R as input signal ranges of ±1, ±2, ±5, and ±10 V. While the analog output range is ±10 V.
Coupling (Input and Output)
A property of the interface of two circuits that defines which types of signals are passed from one side of the interface to the other. There are generally two options:
- DC coupling: will pass both AC and DC signals
- AC coupling: will pass only AC signals, resulting in a hardware implementation of removing a signal's DC offset
Some devices feature software-selectable coupling, while some have either AC or DC.
The NI PXIe-7847R has DC coupling on both the analog input and analog output. It does not support AC coupling on either.
Basic Information about AC and DC Coupling
The difference between the ideal step size of an ADC or DAC and the actual value that is input/output respectively (typically measured in LSB). In an ideal ADC or DAC, Differential non-linearity would be 0 LSB.
The NI PXIe-7847R has a DNL of ±0.9 LSB maximum, which means that for any value that is input into the ADC, the actual value can be ±0.9 LSB away from the value read. For example, if the user reads the input of the ADC to be a value of 1 V on the ±5 V range, the input (not including effects of accuracy) can range from:
INL is the compound effect of DNL so the INL specification is often used in accuracy calculations. For the NI PXIe-7847R, the INL specification in the AI accuracy table is 42.52 ppm on the ±10 V
Analog-to-Digital Converter (ADC) Type
Successive Approximation register (SAR) is a type of ADC which implements a binary search algorithm to convert a continuous analog signal to a discrete digital representation.
The NI PXIe-7847R uses a SAR ADC
Amount of time that the input signal must be held constant while the SAR ADC performs the conversion. This is often done through sample and hold circuitry internal to the ADC.
Maximum Sampling Rate (per channel)
The fastest data acquisition rate that the PCI/PCIe, PXI/PXIe, or USB can achieve per channel.
The PXIe-7847R has a maximum sampling rate (per channel) of 500kS/s. All R Series boards are simultaneously sampling (ie. Sampling rate per channel).
Input impedance is a measure of how the input circuitry impedes current from flowing through to analog input ground. For an ideal ADC, this value should be infinite—meaning no current will flow from the input to ground—but in practice this is not possible. The implication of some finite input impedance is that the ADC will have some degree of loading down a circuit, particularly those of high output impedance. It is typical for sensors to have low output impedance.
The NI PXIe-7847R has an input impedance of Zin > 1.25 G Ω in parallel with a 2 pF capacitor. Taking the worst case scenario of lowest input impedance, you can view a single-ended measurement as the following simplified circuit, assuming a sensor with output impedance Zout = 150 Ω.
The series combination of the sensor output and DAQ device input means that voltage will be divided between the two impedance values, with the larger impedance bearing most of the voltage. This means that if the sensitivity of this sensor is 20 °C / V and is measuring 100 °C (outputting 5 V), then the voltage measured by the DAQ device will be the output voltage multiplied by the ratio of the input impedance to the sum of the DAQ input and sensor output impedance:
This .6 mV measurement difference corresponds to a near-negligible .012 °C measurement error due to impedance.
To illustrate an example when input impedance becomes an important specification, take the hypothetical case where a sensor has an extremely high output impedance, such as .625 GΩ. Connecting the DAQ device to a sensor with this extremely high output impedance causes a 5 V nominal output from the sensor to be read as 3.33 V, or a hypothetical measurement error of 33.4 °C.
Input Bias Current
A consequence of having a finite input impedance is that the device requires a small amount of current to be able to detect a signal. Theoretically, this value should be 0 A, but in practice this is not possible.
The NI PXIe-7847R has an input bias current of ±5 nA. This means that any sensor being measured by the NI PXIe-7847R must be able to source at least that much current across its entire voltage output range in order to be correctly digitized.
Input Offset Current
The difference between IB+ and IB- going into the terminals of an Op Amp can be defined as the input offset current. This difference in current will affect the voltage at this node.
The analog input circuitry has protection diodes in place that will gate a large voltage from damaging the most critical components of the device, such as the PGIA or ADC.
- When the device is powered on, these diodes are biased at some positive and negative voltage, meaning that a voltage larger than the sum of the bias and reverse voltage must be present before these diodes are overloaded and can be damaged.
- When the device is off, the bias voltage is removed, so the voltage needed to reverse the diodes is lower, making the device more susceptible to being damaged.
The NI PXIe-7847R has protection up to ±42 V for AI pins. While the device is off, there is a lower level of protection at ±35 V.
Maximum working voltage specifies the total voltage level that a device can tolerate on any analog input channel before data validity on other channels becomes an issue. The combination of the signal to be measured and any common mode voltage with respect to AI GND should not exceed this maximum working voltage specification to guarantee accuracy on other channels. Note that the maximum working voltage is independent of the input range of the device.
A 10 Vpk sine wave with 2.0 VDC common mode is being measured on a PXIe-7847R, which has a maximum working voltage of ± 10 V when the AI is configured to a ± 5 V range, as shown below:
The combination of the two signals peaks at +12.0 V, which exceeds the maximum working voltage.
Common Mode Rejection Ratio (CMRR)
When the same signal is seen on the positive and negative inputs of an amplifier, the CMRR specifies how much of this signal is rejected from the final output (typically measured in dB). An ideal amplifier will remove 100% of the common mode signal, but this is not achievable in implementation.
The NI PXIe-7847R has a CMRR of -100 dB from DC to 60Hz. This means that it will attenuate common mode voltages by 100,000x. If the signal being measured is a 5 Vpk sine wave, and the offset or common voltage between the positive and negative inputs is 5 VDC, the final output will reject or attenuate the 5 VDC input to 5 µV. CMRR is not included in accuracy derivations and should be accounted for separately if the signal measured contains common mode voltages.
Small Signal Bandwidth
The range of frequencies that is passed with attenuation less than –3 dB. Tests for small signal bandwidth are made with low voltage signals so that slew rate distortion is not a factor.
The NI PXIe-7847R has a small signal bandwidth of 1 MHz.
Large Signal Bandwidth
The range of frequencies that is passed with attenuation less than –3 dB. Tests for large signal bandwidth are made with full power signals where slew rate distortion is a factor.
The NI PXIe-7847R has a large signal bandwidth of 500kHz MHz.
The measure of how much a signal on one channel can couple onto, or affect, an adjacent channel. Crosstalk exists any time an amplitude-varying signal is present on a wire or PCB trace that is physically close to another wire or PCB trace.
The NI PXIe-7847R has a crosstalk specification of -80 dB tested from DC to 100kHz, at 50 Ω termination.
For analog output, update rate specifies how often in time the module produces an output. It is tied closely to maximum update rate
Maximum Update Rate
For analog output, update rate specifies how many samples per second the DAC to analog voltage or current values. Most NI devices have a single DAC per analog output channel, but will all share the FIFO where the analog output data is stored. The rate at which data can be read from this FIFO and transferred to the different DACs on board can sometimes limit the update rate when using multiple AO channels on the same device. Update rate is measured in samples per second (S/s).
For the analog input equivalent, see Sample Rate.
The NI PXIe-7847R has eight analog output channels.
- The maximum update rate is 1MS/s
Type of DAC
Digital to analog converters can have different architectures. This specification will tell you what type of DAC was used in the product design.
Example An enhanced R-2R digital to analog converter uses the common concept of using a resistor ladder network to convert a digital signal into an analog voltage
Output Impedance is the impedance that is effectively in series with an analog output channel, as illustrated below:
A low output impedance allows more of the voltage generated to be dropped across the load of the analog output. It is important to take the output impedance into account to ensure that the voltage level desired is achieved.
The NI PXIe-7847R has an output impedance of 0.5 Ω. This means that if a load connected has an impedance of 500 Ω, and the voltage specified by the user is 1 V, the actual voltage on the load would be 0.999 V, or 1.0 mV, less than expected. At this voltage, there will also be 1.99 mA drawn from the device.
Output Current Drive
For analog output, output current drive is the maximum amount of current that the device can sink or source. The load that is connected, including output impedance, combined with the voltage programmed determines the current that will be required to maintain programmed output voltage.
Programmed output voltage is guaranteed if current drive remains below the specified output current drive. Exceeding output current drive puts the device into an overdrive state, where output voltage is no longer guaranteed.
The NI PXIe-7847R is capable of driving ± 2.55 mA from any analog output channel. On the ± 10 V range, this means that the lowest total impedance that can be driven at full scale is determined from the highest power output, or largest current & voltage:
Taking into account the output impedance of the PXIe-7847R, the lowest connected impedance that can be driven at full scale is the difference of the minimum load and the output impedance:
Protection on the analog output pins will be defined by the protection circuitry implemented in each design. This could protect against current fly back spikes, or accidental shorts. But please refer to the individual specification sheet.
Short circuit to ground protection has been implemented in the PXIe-7847R internal protection of the card against an accidental connection between an AO channel and GND. In which case we would expect a current spike, the module has protection against damaging itself in this case.
See also Overvoltage Protection and Overcurrent Protection
The analog output circuitry has protection circuitry in place that will provide protection against input voltages up to a certain voltage, specified by the module.
The NI PXIe-7847R has protection up to ±15 V for A0 pins. While the device is off, there is a lower level of protection at ±10 V. The 5V lines have ±30 V protection
Power-on state specifies the value of an analog output channel when the device has powered on and after a glitching period known as the power-on glitch. Prior to the device receiving power from the bus, the value on the output is described in the power-on glitch specification.
The NI PXIe-7847R will have the analog output channels as user configurable upon power-on.
When applying and removing power from the device, there is a glitch signal on the analog output channels.
- Glitch Energy Magnitude—The peak amplitude that a glitch signal reaches during a glitch period
- Glitch Energy Duration—The length of time for the glitch signal to subside within the power-on state
The NI PXIe-7847R has a specified glitch of 1 V for 1 µs.
Monotonicity is the guarantee that when DAC codes increase, the output voltage also increases.
The NI PXIe-7847R guarantees that the output voltage increases as DAC codes increase. For example, a ramp function will always either increase or decrease depending on the direction of the ramp.
The amount of time it takes for an analog output value to stabilize to within a certain degree of precision.
The NI PXIe-7847R has a settling time of a full-scale step to within ±16 LSB of 5.3 µs. This means that for a full-scale oscillation on the ±20 V step size (V) the maximum frequency that can be driven to within 16 LSB is 1/(5.3 µs) = 188.68 kHz.
Slew rate specifies the rate of change for the analog output channels in a given device. It is typically measured in V/µs. Settling time for output is calculated with slew time already included in the calculation. It is important to consider slew rate when designing a system for high amplitude high frequency signals, as the large swing in amplitude may exceed the slew rate for a given device.
The NI PXIe-7847R has a typical slew rate of 10 V/µs, this means that the highest frequency at the ±5V scale that can be generated is 1 MHz. This number was calculated by taking calculating the frequency from time (freq=(1/t)). Knowing that the range of ±5V is 10V, and knowing that the slew rate is 10 V/µs, we can calculate that the highest frequency is (1/ 1µs) or 1MHz. Attempting to output a full scale signal with higher amplitude will result in unwanted distortion.
Glitch Energy at Midscale Transition
Glitch energy at midscale is produced by the DAC. The reason these glitches occur is that inherently in the DAC, when the Most Significant Bit (MSB) is switched in the middle of the range of the DAC the internal circuitry will produce a glitch. It is specified similarly to a power on glitch, and is an integral of the voltage over time.
The PXIe-7847R has a glitch energy at midscale of ±10mV for 3 µs.
The 5V line will have a tolerance related to what voltage range is considered acceptable coming from the 5V pin.
The PXIe-7847R is considered within specification if the 5V pin outputs voltage in the range of 4.75V to 5.1V.
The output current specification in regards to the 5V output, is to let the user know that there is a limit on the amount of current that pin can source.
If a user is wanting to use the 5V pin as an excitation line to power one of their sensors, that should be fine assuming that the load of the sensor is large enough to guarantee the module does not reach its specified current limit for the 5V pin. For example the PXIe-7847R has output current of 0.5A maximum from the 5V pin.
If V=IR, and V=5, and I must satisfy I < 0.5, then R, the resistance of the load must be at least 10 Ω.
Covered in overvoltage protection section under analog output
The current limit condition that will cause the module to go into an overcurrent state.
The PXIe-7847R has an overcurrent protection at 650mA. So at this value the board will go into a overcurrent state.