NI MIO DAQ devices and modules may have analog input, analog output, or a mix of both systems. There are specifications unique to each subsystem, but also some specifications which apply to both. This section is organized in three sections to cover the common specifications, analog input specific, and analog output specific.
Analog Input and Analog Output
Absolute Accuracy at Full Scale
Accuracy refers to how close to the correct value of a measurement is. Absolute Accuracy at Full Scale is a calculated theoretical accuracy assuming the value being measured is the maximum voltage supported in a given range. The accuracy of a measurement will change as the measurement changes, so to be able to make a comparison between devices, the accuracy at full scale is used. Note that absolute accuracy at full scale makes assumptions about environment variables, such as 25 °C operating temperature, that may be different in practice.
- Nominal Range Positive Full Scale—The ideal maximum positive value that can be measured in a particular range
- Nominal Range Negative Full Scale—The ideal maximum negative value that can be measured in a particular range
- Residual Gain Error—Gain error inherent to the instrumentation amplifier and is known to exist after a self-calibration
- Gain Tempco—The temperature coefficient that describes how temperature impacts the gain of the amplifier compared to the temperature at last self-calibration
- Residual Offset Error—Offset error inherent to the instrumentation amplifier and is known to exist after a self-calibration
- Reference Tempco—The temperature coefficient that describes how accurate a measurement is at a specific temperature compared to the temperature at last external calibration
- INL Error (relative accuracy resolution)—The maximum deviation from the voltage output of an ADC to the ideal output. Can be thought of as worst case DNL. See also: DNL
- Offset Tempco—The temperature coefficient that describes how temperature affects the offset in an ADC conversion compared to the temperature at last self-calibration
- Random/System Noise—Additional system noise generated by the analog front end, measured by grounding the input channel
The NI PXIe-6363 has a range of ± 0.5 V. The absolute accuracy at full scale is calculated with the assumption that the signal being measured is 0.5 V. The absolute accuracy at full scale for the ± 0.5 V range is 100 µV.
How Do I Calculate Absolute Accuracy Or System Accuracy?
Analog-to-Digital Converter (ADC) Resolution
Resolution is the smallest amount of input signal change that a device or sensor can detect. The number of bits used to represent an analog signal determines the resolution of the ADC.
The NI PXIe-6363 is a 16-bit device, which means that lowest amplitude change that can be detected on the ±5 V range is 0.152 mV. On the ± 0.1 V range, this value is 3.05 µV.
Common Mode Rejection Ratio (CMRR)
When the same signal is seen on the positive and negative inputs of an amplifier, the CMRR specifies how much of this signal is rejected from the final output (typically measured in dB). An ideal amplifier will remove 100% of the common mode signal, but this is not achievable in implementation.
The NI PXIe-6363 has a CMRR of 100 dB. This means that it will attenuate common mode voltages by 100,000x. If the signal being measured is a 5 Vpk sine wave, and the offset or common voltage between the positive and negative inputs is 5 VDC, the final output will reject or attenuate the 5 VDC input to 5 µV. CMRR is not included in accuracy derivations and should be accounted for separately if the signal measured contains common mode voltages.
The settling time required between channels in a multichannel measurement.
The PCI-6221 has a convert interval ranging from 4 to 7 µs, depending on the level of accuracy required by the user.
Data Acquisition Sampling Terminology
A property of the interface of two circuits that defines which types of signals are passed from one side of the interface to the other. There are generally two options:
- DC coupling: will pass both AC and DC signals
- AC coupling: will pass only AC signals, resulting in a hardware implementation of removing a signal's DC offset
Some devices feature software-selectable coupling, while some have either AC or DC.
The NI PXIe-6363 has DC coupling on both the analog input and analog output. It does not support AC coupling on either.
Basic Information about AC and DC Coupling
The measure of how much a signal on one channel can couple onto, or affect, an adjacent channel. Crosstalk exists any time an amplitude-varying signal is present on a wire or PCB trace that is physically close to another wire or PCB trace.
The NI PXIe-6363 has a crosstalk specification of -75 dB for adjacent channels and -95 dB for non-adjacent channels. This means that channel ai2 will have a crosstalk specification of -75 dB between channels ai1 and ai3, and a crosstalk specification of -95 dB to all other ai channels.
Data Transfer Mechanisms
NI devices bidirectionally transfer data from the device to the computer (in the case of input), and from the computer to the device (in the case of output). Different data transfer mechanism are used depending on the bus (USB, PXI Express, and so on). Some buses can support multiple transfer mechanisms. Refer to the NI-DAQmx help documentation for more information on specific mechanisms.
The USB-6341 supports USB Bulk (Signal Stream) and programmed I/O data transfers. The NI PXIe-6363 supports direct memory access (DMA) and programmed I/O.
What is Scatter-Gather DMA (Direct Memory Access)?
Differential Non-Linearity (DNL)
The difference between the ideal step size of a DAC (See Digital-to-Analog Converter (DAC) Resolution for how to calculate step size) and the actual value that is output (typically measured in LSB). In an ideal DAC, DNL would be 0 LSB.
The NI PXIe-6363 has a DNL of ±1 LSB, which means that for any value that is output from the DAC, the actual value can be ±1 LSB away from the value programmed. For example, if the user programs the DAC to output a value of 1 V on the ±5 V range, the output (not including effects of accuracy) can range from:
INL is the compound effect of DNL so the INL specification is often used in accuracy calculations. For the NI PXIe-6363, the INL specification in the accuracy table is 64 ppm, or 4 LSB, of the range used.
FIFO Size (Analog)
NI DAQ devices can store data in an onboard FIFO when performing analog input or analog output tasks.
- For input tasks, this FIFO is used to buffer data prior to the NI-DAQmx driver software transferring the data to a pre-allocated location in RAM known as the PC buffer.
- For output tasks, the data that a user requests to generate can be buffered in a combination of the FIFO and the PC buffer.
Devices that have input and output channels will have a dedicated FIFO for each subsystem. However, the FIFO is shared across all channels within that FIFO. For analog input, NI-DAQmx implements data transfer mechanisms to ensure that the data stored in the FIFO is transferred to the PC buffer fast enough so that the onboard FIFO is not overrun. For analog output, NI-DAQmx implements data transfer mechanisms to ensure that data in the PC buffer is transferred to the onboard FIFO fast enough such that the FIFO is not underrun. For analog output, there are user-selectable properties to specify whether or not to use the PC buffer at all, and to regenerate a single waveform from just the onboard FIFO.
The NI PXIe-6363 has an input FIFO of 2,047 samples. This means that an input task with four channels acquiring data at a rate of 1,024 S/ch/s will overrun the onboard FIFO in less than half a second:
NI-DAQmx uses DMA to transfer data from the FIFO to onboard computer memory, known as the buffer, to avoid the overrun.
Configuring the Data Transfer Request Condition Property in NI-DAQmx
Waveform Acquisition (DI) FIFO
Waveform Generation (DO) FIFO
Input Bias Current
A consequence of having a finite input impedance is that the device requires a small amount of current to be able to detect a signal. Theoretically, this value should be 0 A, but in practice this is not possible.
The NI PXIe-6363 has an input bias current of ±100 pA. This means that any sensor being measured by the NI PXIe-6363 must be able to source at least that much current across its entire voltage output range in order to be correctly digitized.
Input Current During Overvoltage Condition
When the device is in an overvoltage condition, this is the specified amount of current that the device will sink.
The NI PXIe-6363 sinks a maximum of ±20 mA per pin in an overvoltage state. Exceeding this value may result in damage to critical components.
Input impedance is a measure of how the input circuitry impedes current from flowing through to analog input ground. For an ideal ADC, this value should be infinite—meaning no current will flow from the input to ground—but in practice this is not possible. The implication of some finite input impedance is that the ADC will have some degree of loading down a circuit, particularly those of high output impedance. It is typical for sensors to have low output impedance.
The NI PXIe-6363 has an input impedance of Zin > 10 G Ω. Taking the worst case scenario of lowest input impedance, you can view a single-ended measurement as the following simplified circuit, assuming a sensor with output impedance Zout = 150 Ω.
The series combination of the sensor output and DAQ device input means that voltage will be divided between the two impedance values, with the larger impedance bearing most of the voltage. This means that if the sensitivity of this sensor is 20 °C / V and is measuring 100 °C (outputting 5 V), then the voltage measured by the DAQ device will be the output voltage multiplied by the ratio of the input impedance to the sum of the DAQ input and sensor output impedance:
This 75 nV measurement difference corresponds to a near-negligible 05 °C measurement error due to impedance.
To illustrate an example when input impedance becomes an important specification, take the hypothetical case where a sensor has an extremely high output impedance, such as 5 GΩ. Connecting the DAQ device to a sensor with this extremely high output impedance causes a 5 V nominal output from the sensor to be read as 3.33 V, or a hypothetical measurement error of 33.4 °C.
Maximum Update Rate
For analog output, update rate specifies how many samples per second the DAC to analog voltage or current values. Most NI devices have a single DAC per analog output channel, but will all share the FIFO where the analog output data is stored. The rate at which data can be read from this FIFO and transferred to the different DACs on board can sometimes limit the update rate when using multiple AO channels on the same device. Update rate is measured in samples per second (S/s) when outputting from a single channel, or samples per second per channel (S/s/ch) when outputting from multiple channels.
For the analog input equivalent, see Sample Rate.
The NI PXIe-6363 has four analog output channels.
- When using a single channel, the update rate on that channel is 2.86 MS/s.
- When using three channels of analog output, the maximum update rate is 1.54 MS/s/ch—the rate at which data can be read from the FIFO and sent to the various DACs limits the update rate progressively as more channels are added to the scan list.
Maximum Working Voltage
Maximum working voltage specifies the total voltage level that a device can tolerate on any analog input channel before data validity on other channels becomes an issue. The combination of the signal to be measured and any common mode voltage with respect to AI GND should not exceed this maximum working voltage specification to guarantee accuracy on other channels. Note that the maximum working voltage is independent of the input range of the device.
A 10 Vpk sine wave with 2.5 VDC common mode is being measured on a PXIe-6363, which has a maximum working voltage of ± 11 V, as shown below:
The combination of the two signals peaks at +12.5 V, which exceeds the maximum working voltage. Exceeding the maximum working voltage puts data validity on other multiplexed channels at risk due to excess charge on the multiplexer not having enough time to settle.
Monotonicity is the guarantee that when DAC codes increase, the output voltage also increases.
The NI PXIe-6363 guarantees that the output voltage increases as DAC codes increase. For example, a ramp function will always either increase or decrease depending on the direction of the ramp.
Output Current Drive
For analog output, output current drive is the maximum amount of current that the device can sink or source. The load that is connected, including output impedance, combined with the voltage programmed determines the current that will be required to maintain programmed output voltage.
Programmed output voltage is guaranteed if current drive remains below the specified output current drive. Exceeding output current drive puts the device into an overdrive state, where output voltage is no longer guaranteed.
The NI PXIe-6363 is capable of driving ± 5 mA from any analog output channel. On the ± 10 V range, this means that the lowest total impedance that can be driven at full scale is determined from the highest power output, or largest current & voltage:
Taking into account the output impedance of the PXIe-6363, the lowest connected impedance that can be driven at full scale is the difference of the minimum load and the output impedance:
Output Impedance is the impedance that is effectively in series with an analog output channel, as illustrated below:
A low output impedance allows more of the voltage generated to be dropped across the load of the analog output. It is important to take the output impedance into account to ensure that the voltage level desired is achieved
The NI PXIe-6363 has an output impedance of 0.2 Ω. This means that if a load connected has an impedance of 500 Ω , and the voltage specified by the user is 1 V, the actual voltage on the load would be 0.9996 V, or 0.4 mV, less than expected. At this voltage, there will also be 1.99 mA drawn from the device.
Overdrive (Short Circuit) Current
If the combination of output and load impedance is too low such that more current is drawn from the device than is specified by the output current drive, the device goes into an overdrive state. Overdrive, or short circuit, current is the maximum amount of current that the device will be able to supply without damage. In this overdrive state, the voltage will droop as current draw increases.
Exceeding the overdrive current may cause damage to the device. NI recommends using the device within the output current drive specification at all times to avoid damaging the device.
The NI 6363 has an overdrive current specification of 26 mA. Exceeding this value, for example during a short circuit, may cause damage to the device.
Output Current Drive
For analog output, overdrive protection is the maximum voltage that can be tolerated on the channel before damage to the device occurs. This specification is higher than the actual voltage that can be programmed in the case of accidental back-driven voltage.
The NI PXIe-6363 is protected up to ± 25 V on each analog output channel individually. This means that no matter what voltage is programmed to be output, as long as the voltage at the pin with respect to AO GND is within ± 25 V, no damage will occur to the device. Exceeding this value may cause damage to the device.
The analog input circuitry has protection diodes in place that will gate a large voltage from damaging the most critical components of the device, such as the PGIA or ADC.
- When the device is powered on, these diodes are biased at some positive and negative voltage, meaning that a voltage larger than the sum of the bias and reverse voltage must be present before these diodes are overloaded and can be damaged.
- When the device is off, the bias voltage is removed, so the voltage needed to reverse the diodes is lower, making the device more susceptible to being damaged.
When in an overvoltage state, the maximum amount of current that a device can sink is specified by the input current during overvoltage condition.
The NI PXIe-6363 has protection up to ±25 V for two AI pins. If more than two AI pins experience an overvoltage larger than ±25 V, the device can be damaged. While the device is off, there is a lower level of protection at ±15 V.
Power-on state specifies the value of an analog output channel when the device has powered on and after a glitching period known as the power-on/off glitch. Prior to the device receiving power from the bus, the value on the output is described in the power-on glitch specification.
The NI PXIe-6363 will have ± 5 mV on the analog output channels upon power-on.
When applying and removing power from the device, there is a glitch signal on the analog output channels.
- Glitch Energy Magnitude—The peak amplitude that a glitch signal reaches during a glitch period
- Glitch Energy Duration—The length of time for the glitch signal to subside within the power-on state
The NI PXIe-6363 has a specified glitch of 1.5 Vpk for 200 ms The NI USB-6363 has a specified glitch of 1.5 Vpk for 1.2 s. The glitch period on USB devices can be longer than specified due to firmware updates and USB host performance.
Range (Input or Output)
For analog input, this is the maximum positive and negative value that can be measured with guaranteed accuracy. For analog output, this is the maximum positive or negative value that can be generated. Some devices have multiple input or output ranges that can be used to provide a higher resolution at lower level signals.
The NI PXIe-6363 has four input voltage ranges: ±0.1 V, ±0.2 V, ±0.5 V, ±1 V, ±2 V, ±5 V, ±10 V. It has one output range: ± 10 V.
Analog-to-Digital Converter (ADC) Resolution
Digital-to-Analog Converter (DAC) Resolution
Sample rate specifies how often an ADC converts data from analog to digital values. Some devices have only one ADC, so the sample rate is shared across channels while other devices have a dedicated ADC per channel. Sample rate is measured in Samples per second (S/s) or Samples per second per channel (S/s/ch) when acquiring from multiple channels.
- Single Channel Maximum—For a shared sample rate across channels, a single channel can acquire data at a higher rate than allowed when sharing
- Multichannel Maximum—For a device that shares the sample rate across channels, this is the maximum rate at which all channels combined can acquire data
- Minimum—The minimum rate at which data can be acquired
For the analog output equivalent, see Maximum Update Rate.
The NI PXIe-6363 is a multiplexed device, meaning the analog input channels are multiplexed into a single ADC. A single analog input channel can sample analog signals up to 2 million samples per second (2 MS/s). When using multiple channels, the combined rate from all channels must be under 1 MS/s (2 channels can sample at 500 kS/s/ch, 4 channels can sample at 250 kS/s/ch, and so on). There is no minimum sample rate for this device.
Scan List Memory
The number of channels scanned in a task is specified as the scan list memory. An analog input task can contain many virtual channels in a sequence known as a scan list. The scan list can contain the same physical channel many times, and samples may be taken in any arbitrary order. When the task is committed, this scan list is temporarily programmed to the DAQ device.
The NI PXIe-6363 has a scan list memory of 4,095 entries. This means that one scan, or one tick of the sample clock, can trigger up to 4,095 physical channels being read when all physical channels are contained in a single task. However, keeping the settling time for multichannel measurements (also known as convert interval for some devices) in mind, this would limit the sample clock rate to a maximum of around 250 Hz.
The amount of time it takes for an analog output value to stabilize to within a certain degree of precision.
The NI PXIe-6363 has a settling time of a full-scale step to within 1 LSB or 15 ppm of 2 µs. This means that for a full-scale oscillation on the ±5 V range (-5 V, 5 V, -5 V, 5 V, and so on) the maximum frequency that can be driven to within 1 LSB is 1/(2 µs) = 500 kHz.
Settling Time for Multichannel Measurements
The amount of time that the ADC must be connected to each channel when performing a multichannel acquisition.
When acquiring data on the NI PXIe-6363 in a ±10 V range, the multiplexer must remain on a single channel for up to 1.5 µs for the programmable gain instrumentation amplifier (NI-PGIA) to settle within 1 least significant bit (LSB) of the actual value with a full scale step input provided.
Slew rate specifies the rate of change for the analog output channels in a given device. It is typically measured in V/µs. Settling time for output is calculated with slew time already included in the calculation. It is important to consider slew rate when designing a system for high amplitude high frequency signals, as the large swing in amplitude may exceed the slew rate for a given device.
The NI PXIe-6363 has a typical slew rate of 20 V/µs, this means that the high frequency at full scale that can be generated is 1 MHz. Attempting to output a full scale signal with higher amplitude will result in unwanted distortion.
Small Signal Bandwidth
The range of frequencies that is passed with attenuation less than –3 dB. Tests for small signal bandwidth are made with low voltage signals so that slew rate distortion is not a factor.
The NI PXIe-6363 has a small signal bandwidth of 1.7 MHz, as characterized below:
Spurious Free Dynamic Range (SFDR)
Spurious free dynamic range is the usable dynamic range before spurious noise interferes with or distorts the fundamental signal. Analog input and analog output circuitry both have non-linearities that result in harmonic distortion. SFDR is easily observable in the frequency domain as:
The PCI-6133 has an SFDR of around 95 dB. Taking the graph below as an example, if the fundamental signal was applied at 0 dB, the next highest spur would occur at 95 dB lower - providing a usable dynamic range without spurious interference.
When generating a clock signal on an NI DAQ device for timing signals, the actual frequency generated will be within the timing accuracy. This specification is derived from the overall accuracy of the onboard crystal oscillator. Timing accuracy is typically measured in parts per million (ppm). To convert this accuracy value to Hz, multiply by the accuracy value divided by 1 million. The frequency of the clock is not likely to change drastically from cycle to cycle.
The PXIe-6363 has a timing accuracy of 50 ppm. For an analog output task with an update rate of 1,000 S/s, the sample clock will run at 1,000 Hz ± 50 ppm. In Hz, this comes out to:
Sample and update rates for analog input and output tasks are restricted to discrete values when using an onboard timing engine. The difference in clock periods between two adjacent rates is known as timing resolution. NI-DAQmx will coerce a selected frequency up to the next available frequency if it cannot generate the exact one specified by the user.
The NI PXIe-6363 has a specified timing resolution of 10 ns. This means that it can generate or acquire data at integer multiples of 10 ns. For example, 32,000.00 Hz and 32,010.2432... Hz are two adjacent frequencies, as their clock periods are 31.250 µs & 31.240 µs, respectively. To find the next available frequency, add or subtract the timing resolution to a known clock period.
Total Harmonic Distortion (THD)
Due to inherent nonlinearities of ADC and DAC components, harmonic frequencies will appear in the measured or generated signals. The ratio of the sum of these harmonics' powers to the power of the fundamental is known as total harmonic distortion.
The PCI-6133 has a specified THD of around -101 dB. This means that for a given test signal, in this case a 10 kHz sine wave at full scale, the power in the signal attributed to harmonic distortion is less than 0.001%. Conversely, more than 99.999% of the power that is measured can be attributed to the fundamental tone or signal of interest.