FPGA Implementation Page (Array Constant Properties Dialog Box)

Contains the following options:

• Auto (default)—Specifies that the compiler decides whether to implement an array constant in block memory, look-up tables, or flip-flops. Arrays of size n x m > 2048, where n is the number of elements and m is the number of bits per element, are implemented in block memory. Arrays of size n x m ≤ 2048 are implemented in look-up tables.

The compiler also can infer a block memory or look-up table implementation for an array constant based on specific coding patterns. If the compiler cannot infer an implementation, the array constant implements in flip-flops.

An array constant created in another context, such as on the development computer, is automatically set to Auto when opened in an FPGA VI.

• Flip-Flops—Stores the array constant in flip-flops and implements logic operations in look-up tables available on the FPGA. This implementation consumes significant FPGA resources as each bit in the array uses a flip-flop on the FPGA. Use flip-flops when working with small arrays, when you need parallel access to more than one element in an array, or when you have strict timing requirements.

• Look-Up Tables—Stores the array constant in look-up tables available on the FPGA. Xilinx literature describes this implementation as distributed RAM or LUT RAM. If the compiler cannot infer distributed RAM, LabVIEW returns an error.

When used in a single-cycle Timed Loop, read operations execute in the same clock cycle. Data written during a clock cycle is available for read during the next clock cycle.

Use Look-up Tables when you have limited remaining block memory, since look-up tables consume FPGA resources because they can function as either FPGA resources or as memory.

• Block Memory—Stores the array constant using embedded blocks of memory. Xilinx literature describes this implementation as block RAM or BRAM. If the compiler cannot infer block memory, LabVIEW returns an error.

When used in a single-cycle Timed Loop, read operations take one cycle to execute. Data written during a clock cycle is available for read during the next clock cycle.

Use block memory first unless you need the advantages of a different type of memory. Block memory does not consume FPGA resources and tends to compile at a high clock rate relative to other types of memory.

If a compilation report indicates that an application exceeds block memory availability, review your design for small array constants and implement them in look-up tables. Ensure that array constants are used in accepted coding patterns for a look-up table implementation.