FPGA Configuration File XML Tags
- Updated2025-10-27
- 7 minute(s) read
Use XML tags and structure to customize an FPGA configuration file.
<?xml version="1.0"?> <FPGADMAChannelData> <!-- Insert tags here --> </FPGADMAChannelData>
XML schema files (.xsd) are definition files that constrain an XML file to a certain format. You can add a schema file to most XML editing tools when writing an XML file. Use the NI VeriStand FPGA DMA.xsd schema file in the <Common Data>\FPGA directory to minimize syntax and formatting errors when you create an FPGA configuration file.
| Tag | Required? | Parent tag | Number of child tags | Description |
|---|---|---|---|---|
| FPGADMAChannelData | Yes | — | — | Contains all channel definitions. |
| Version | Yes | FPGADMAChannelData | 1 | Defines which version of the channel tags you used to create the FPGA configuration file. For example, if you used the tags defined in this table, you must set the Version tag to 2.0. |
| Bitfile | No | FPGADMAChannelData | 1 | Specifies the name of the corresponding bitfile (.lvbitx). The bitfile must be saved in the same directory as the FPGA configuration file. The default value is <name of FPGA configuration file>.lvbitx. |
| Categories | No | FPGADMAChannelData | 1 | Contains multiple category definitions and describes the hierarchy of the channels visible in System Explorer. You cannot nest <Categories>. |
| Category | Yes | Categories | 0 or more | Defines a single level of the configuration tree hierarchy in System Explorer. You can nest <Category>. If you do not specify <Category> elements, the configuration tree hierarchy is inferred based on the <Category> tags contained within individual channels. |
| Name | Yes | Category | 1 | Defines the name of <Category> in System Explorer configuration tree. <Name> must be unique within its set of siblings. |
| Description | No | Category | 1 | Specifies the description of <Category> in System Explorer. |
| Symbol | No | Category | 1 |
Defines the symbol for <Category> in the System Explorer window configuration tree. You can select from the following values:
|
| DMA_Read | Yes | FPGADMAChannelData | 1 | Contains packet definitions. Specifies the content of the DMA_Read FIFO. |
| DMA_Write | Yes | FPGADMAChannelData | 1 | Contains packet definitions. Specifies the content of the DMA_Write FIFO. |
| Packets | Yes | DMA_XXX* | 1 | Defines the number of unsigned 64-bit packets contained in the DMA FIFO. If the number of <Packet> elements is less than the number specified in <Packets>, VeriStand ignores the last <Packet>. |
| Packet | No | DMA_XXX | 1 or more |
Specifies the content of a single unsigned 64-bit channel in the DMA FIFO. You do not have to use all of the available bits in a packet. You also can specify an empty packet using the <Packet/> tag with no closing tag. An empty <Packet> element specifies a packet that is to be ignored. You might want to use an empty packet for the first DMA_Read packet because the first bit of the first DMA_Read packet contains a Late Status field by default. If you specify an empty packet for the first DMA_Read packet, this unusable Late Status bit does not appear in System Explorer. If you want the Late Status bit to be visible in System Explorer, specify it as a Boolean channel in the first DMA_Read packet. |
| I8 | No | Packet | 0 or more | Specifies a signed 8-bit channel in the DMA FIFO. |
| U8 | No | Packet | 0 or more | Specifies an unsigned 8-bit channel in the DMA FIFO. |
| I16 | No | Packet | 0 or more | Specifies a signed 16-bit channel in the DMA FIFO. |
| U16 | No | Packet | 0 or more | Specifies an unsigned 16-bit channel in the DMA FIFO. |
| I32 | No | Packet | 0 or more | Specifies a signed 32-bit channel in the DMA FIFO. |
| U32 | No | Packet | 0 or more | Specifies an unsigned 32-bit channel in the DMA FIFO. |
| I64 | No | Packet | 0 or more | Specifies a signed 64-bit channel in the DMA FIFO. |
| U64 | No | Packet | 0 or more | Specifies an unsigned 64-bit channel in the DMA FIFO. |
| Boolean | No | Packet | 0 or more | Specifies a Boolean channel in the DMA FIFO. |
| FXPI32 | No | Packet | 0 or more | Specifies a fixed-point signed 32-bit channel in the DMA FIFO. Use this data type if the word length you specify in <FXPWL> is less than or equal to 32 bits. The channel occupies the full 32 bits in the packet, but only use the bits corresponding to the word length. |
| FXPU32 | No | Packet | 0 or more | Specifies a fixed-point unsigned 32-bit channel in the DMA FIFO. Use this data type if the word length you specify in <FXPWL> is less than or equal to 32 bits. The channel still occupies the full 32 bits in the packet, but only the bits corresponding to the word length are used. |
| FXPI64 | No | Packet | 0 or more | Specifies a fixed-point signed 64-bit channel in the DMA FIFO. Use this data type if the word length you specify in <FXPWL> is greater than 32 bits. The channel still occupies the full 64 bits in the packet, but only the bits corresponding to the word length are used. |
| FXPU64 | No | Packet | 0 or more | Specifies a fixed-point unsigned 64-bit channel in the DMA FIFO. Use this data type if the word length you specify in <FXPWL> is greater than 32 bits. The channel still occupies the full 64 bits in the packet, but only the bits corresponding to the word length are used. |
| PWM | No | Packet | 0 or more | Specifies a pulse width modulation (PWM) channel in the DMA FIFO. Consists of two 32-bit numbers, totaling 64 bits. The lower 32 bits represent the low time of the PWM channel. The higher 32 bits represent the high time of the PWM channel. |
| Void | No | Packet | 0 or more | Specifies unused bits in the middle of a packet. |
| Size | Yes | Void | 1 | Specifies the number of bits to ignore in a packet. |
| Name | Yes | any data type | 1 | Defines the name of the channel in System Explorer. This tag must be unique within its category. |
| Description | No | any data type | 1 | Specifies the description of the channel in System Explorer. |
| Category | No | any data type | 1 | Specifies the full path of the category where the channel should appear. If you do not specify <Category>, the default is Input for channels in the DMA_Read FIFO and Output for channels in the DMA_Write FIFO. |
| InitialValue | No | any data type | 1 |
Specifies the value of the channel until its value is set. The default value is 0. Use <InitialValue> for output channels. |
| Scale | No | any data type | 1 |
Specifies the range of the scale in engineering units. For PWM and fixed-point data types, the default value is 1. For all other data types, the default value is the full positive range of the data type. For example, the full positive range of the signed 8-bit data type is 127, and the full positive range of the unsigned 8-bit data type is 255. |
| Offset | No | any data type | 1 | Specifies the offset of the scale in engineering units. The default value is 1. |
| Unit | No | any data type | 1 | Specifies the units of the channel. If you do not specify the units, the channel has no units. |
| Symbol | No | any data type | 1 |
Defines the symbol of the channel in System
Explorer. You can select from the following
values:
|
| FXPWL | No | any fixed-point data type | 1 | Specifies the fixed-point word length. |
| FXPIWL | No | any fixed-point data type | 1 | Specifies the fixed-point integer word length. The default value is 0. |
| PWMPeriod | No | PWM | 1 | Specifies the pulse width modulation (PWM) period for output channels. The default value is 100000. |
| Parameters | No | any data type | 1 | Specifies the parameters associated with the parent channel. |
| any data type except for Void | Yes | Parameters | 1 or more |
Defines a parameter associated with the parent channel and specifies the data type of that parameter. <Parameters> accepts the same data types as <Packet>. However, Void is not a valid data type for <Parameters>. If you use the Boolean data type, or the signed or unsigned
8-bit, 16-bit, 32-bit, or 64-bit data types, the associated
FPGA VI control must be of the same data type. If you use
the fixed-point or PWM data types, the data type of the
associated FPGA VI control must correspond as follows:
|
| Name | Yes | any data type except for Void | 1 | Defines the name of the parameter on the channel configuration page in System Explorer. |
| ControlName | No | any data type except for Void | 1 | Specifies the name of the associated control in the corresponding FPGA VI. The default is the same as <Name>. The control referenced in the parameter must exist in the FPGA VI. |
| InitialValue | No | any data type except for Void | 1 |
Specifies the parameter value when System Explorer loads the FPGA configuration file. The default value is 0. You can change parameter values in System Explorer. You cannot change parameter values at run time. |
| Scale | No | any data type except for Void | 1 |
Specifies the range of the scale in engineering units. For PWM and fixed-point data types, the default value is 1. For all other data types, the default value is the full positive range of the data type. For example, the full positive range of the signed 8-bit data type is 127, and the full positive range of the unsigned 8-bit data type is 255. |
| Offset | No | any data type except for Void | 1 | Specifies the offset of the scale in engineering units. The default value is 1. |
| * DMA_XXX denotes both DMA_Read and DMA_Write. | ||||
Related Information
- Example FPGA Configuration File Structure
An FPGA configuration file needs to be structured correctly in XML to function properly.
- DMA Scale and Offset
Scale and offset are useful for converting the DMA FIFO value (DFV) to a usable value that corresponds to a real-world measurement.