PXIe-6570 Specifications

PXIe-6570 Specifications

These specifications apply to the PXIe-6570. When using the PXIe-6570 in the Semiconductor Test System, refer to the Semiconductor Test System Specifications.

Revision History

Version Date changed Description
375726G-01 July 2025 Active Load specification update.
375726F-01 April 2025 Pinout added.
375726E-01 June 2018 NI-Digital Pattern 18.0 driver updates.
375726D-01 June 2017 Added frequency ranges.
375726C-01 May 2017 Formatting updates. No specifications changed.
375726B-01 October 2016 Initial release.

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Definitions

Warranted Specifications describe the performance of a model under stated operating conditions and are covered by the model warranty. Specifications account for measurement uncertainties, temperature drift, and aging. Specifications are ensured by design or verified during production and calibration.

Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.

  • Typical—describes the performance met by a majority of models.
  • Nominal—describes an attribute that is based on design, conformance testing, or supplemental testing.

    • Values are Nominal unless otherwise noted.

    Conditions

    Specifications are valid under the following conditions unless otherwise noted.

    • Operating temperature of 0 °C to 45 °C
    • Operating temperature within ±5 ºC of the last self-calibration temperature
    • Recommended calibration interval of 1 year. The PXIe-6570 will not meet specifications unless operated within the recommended calibration interval.
    • DUT Ground Sense (DGS) same potential as the Ground (GND) pins
      Note The DGS feature is only available on PXIe-6570 module revisions 158234C-xxL or later.
    • Chassis fans set to the highest setting if the PXI Express chassis has multiple fan speed settings
    • 30-minute warmup time before operation
    Note When the pin electronics on the PXIe-6570 are in the disconnect state, some I/O protection and sensing circuitry remain connected. Do not subject the PXIe-6570 to voltages beyond the supported measurement range.

    PXIe-6570 Pinout

    Figure 1. PXIe-6570 Connector Pinout


    Table 1. PXIe-6570 Digital Data and Control Connector Pins/ Signal Descriptions
    Signal Type Signal Name Signal Description
    Data DIO <0..31> Bidirectional PPMU-capable digital I/O data channels 0 through 31.
    Ground GND Instrument ground. Acts as the default ground reference when DUT Ground Sense (DGS) is not connected.
    Ground DGS Optional DGS for improved accuracy at higher currents in some configurations.
    Analog CAL MEASURE Resource for external calibration.
    Analog CAL SENSE Resource for external calibration.
    Analog CAL GND Resource for external calibration.
    Analog CAL FORCE Resource for external calibration.
    N/A RESERVED These terminals are reserved for future use. Do not connect to these pins.
    Note The 32 digital I/O data channels on the digital pattern instrument are split into banks for PPMU operation efficiency: DIO<0..7>, DIO<8..15>, DIO<16..23>, DIO<24..31>. PPMU measurements run in parallel when you take measurements on channels across different banks. Taking PPMU measurements simultaneously with channels on the same bank impacts test time performance based on certain measurement settings. Test time performance for frequency counter measurements is not impacted by taking multiple frequency counter measurements on channels in the same bank.

    Physical Characteristics

    Table 2. Physical Characteristics
    PXIe slots 2
    Dimensions 131 mm × 42 mm × 214 mm (5.16 in. × 1.65 in. × 8.43 in.)

    For more information, visit ni.com/dimensions and search by module number.
    Weight 920 g (32.45 oz.)

    General

    Table 3. Channel Count
    Channel count 32
    Table 4. Multi-site Resources per Instrument
    NI-Digital 16.0 4
    NI-Digital 17.0 and later 8
    Table 5. Channel Count and Memory Resources
    System channel count[1]1 The system channel count is the maximum number of channels available when using multiple PXIe-6570 instruments in a single chassis as a digital subsystem. Some functionality described in this document requires that a PXIe-6674T synchronization module be used in conjunction with each digital subsystem. 256
    Large Vector Memory (LVM) 128M vectors
    Table 6. History RAM (HRAM)
    NI-Digital 17.5 and earlier 1,023 cycles
    NI-Digital 18.0 and later (8,192/N sites)-1 cycles
    Table 7. Offset and Memory Range
    Maximum allowable offset (DGS minus GND) ±300 mV
    Supported measurement range[2]2 If the total voltage sourced or driven on any pin relative to GND exceeds the supported measurement range, instrument performance may be degraded. -2 V to 7 V[3]3 Voltages > 6 V require the Extended Voltage Range mode of operation. For additional information, refer to the PXIe-6570 Specifications.

    Timing

    Vector Timing

    Table 8. Vector Timing Characteristics
    Maximum vector rate 100 MHz
    Vector period range 10 ns to 40 µs (100 MHz to 25 kHz)
    Vector period resolution 38 fs
    Table 9. Timing Control
    Vector period Vector-by-vector on the fly
    Edge timing Per channel, vector-by-vector on the fly
    Drive formats Per channel, vector-by-vector on the fly

    Clocking

    Table 10. Clocking Parameters
    Master clock source PXIe_CLK100[4]4 Sourced from chassis 100 MHz backplane reference clock, external 10 MHz reference, or PXIe-6674T.
    Sequencer clock domains One (independent sequencer clock domains on a single instrument not supported)

    Signal Interface

    Note When using NI-Digital 18.0 and later, the maximum vector rate for patterns may be limited by the pulse width requirements, which may not allow all formats and edge multipliers to be used up to the fastest vector rate.
    Table 11. Drive Formats
    100 MHz maximum vector rate Non-Return (NR), Return to Low (RL), Return to High (RH)
    50 MHz maximum vector rate Surround by Complement (SBC)[5]5 The SBC format is not supported within the 2x edge multiplier mode.
    Table 12. Compare Formats
    Compare formats Edge strobe
    Table 13. Edge Multipliers
    NI-Digital 17.5 and earlier 1x
    NI-Digital 18.0 and later 1x, 2x
    Figure 2. Drive Formats


    Figure 3. 2x Mode Drive Formats


    Pin Data States

  • 0—Drive zero
  • 1—Drive one
  • L—Compare low
  • H—Compare high
  • X—Do not drive; mask compare
  • M—Compare midband, not high or low
  • V—Compare high or low, not midband; store results from capture functionality if configured
  • D—Drive data from source functionality if configured
  • E—Expect data from source functionality if configured
  • -—Repeat previous cycle; do not use a dash (-) for the pin state on the first vector of a pattern file unless the file is used only as a target of a jump or call operation
    • Note Termination mode settings affect the termination applied to all non-driving pin states. Non-drive states include L, H, M, V, X, E, and potentially -. Refer to the Programmable input termination mode specification for more information.

    Edge Timing

    Edge Types

    Table 14. Drive Edges
    NI-Digital 17.5 and earlier 4; drive on, drive data, drive return
    NI-Digital 18.0 and later 6; drive on, drive data, drive return, drive data 2, drive return 2, drive off
    Table 15. Compare Edges
    NI-Digital 17.5 and earlier 1; strobe
    NI-Digital 18.0 and later 2; strobe, strobe 2
    Table 16. Time Sets
    Number of time sets[6]6 31 time sets can be configured. One additional time set, represented by a -, repeats the previous time set. 31

    Edge Generation Timing

    Table 17. Edge Placement Range
    Minimum Start of vector period (0 ns)
    Maximum 5 vector periods or 40 µs, whichever is smaller
    Table 18. Minimum Required Edge Separation
    Between any driven data change (NI-Digital 17.5 and earlier) 5 ns
    Between any driven data change (NI-Digital 18.0 and later) 3.75 ns
    Between any Drive On and Drive Off edges 5 ns
    Between Compare Strobes 5 ns
    Table 19. Edge Generation Precision
    Edge placement resolution 39.0625 ps
    TDR deskew adjustment resolution 39.0625 ps
    Table 20. Edge Placement Accuracy: Drive (NI-Digital 17.5 and Earlier)
    Edge Multiplier = 1x ±500 ps, warranted
    Table 21. Edge placement accuracy: Drive (NI-Digital 18.0 and Later)
    Edge Multiplier = 1x ±500 ps, warranted
    Edge Multiplier = 2x Bit rate ≤ 200 Mbps: ±500 ps, typical
    Edge Multiplier = 2x Bit rate ≤ 266 Mbps: ±600 ps, typical
    Table 22. Edge Placement Accuracy: Compare (NI-Digital 17.5 and Earlier)
    Edge Multiplier = 1x ±500 ps, warranted
    Table 23. Edge Placement Accuracy: Compare (NI-Digital 18.0 and Later)
    Edge Multiplier = 1x ±500 ps, warranted
    Edge Multiplier = 2x Bit rate ≤ 100 Mbps: ±500 ps, typical
    Edge Multiplier = 2x Bit rate ≤ 133 Mbps: ±700 ps, typical
    Table 24. Overall Timing Accuracy (NI-Digital 17.5 and Earlier)
    Edge Multiplier = 1x ±1.5 ns, warranted
    Table 25. Overall Timing Accuracy (NI-Digital 18.0 and Later)
    Edge Multiplier = 1x ±1.5 ns, warranted
    Edge Multiplier = 2x Bit rate ≤ 200 Mbps: ±1.5 ns, typical
    Edge Multiplier = 2x Bit rate ≤ 266 Mbps: ±1.8 ns, typical
    Note For specifications in a Semiconductor Test System, refer to the Semiconductor Test System Specifications.

    Driver, Comparator, Load

    Driver

    Table 26. Driver Signal Configuration
    Signal type Single-ended, referenced to the DGS pin when connected. Otherwise referenced to GND.
    Programmable levels VIH, VIL, VTERM
    Table 27. Driver Voltage Levels
    Range (VIH, VIL, VTERM) -2 V to 6 V
    Minimum swing (VIH minus VIL) 400 mV, into a 1 MΩ load
    Resolution (VIH, VIL, VTERM) 122 µV
    Accuracy (VIH, VIL, VTERM) ±15 mV, 1 MΩ load, warranted
    Table 28. Driver Characteristics
    Maximum DC drive current ±32 mA
    Output impedance 50 Ω
    Rise/fall time, 20% to 80% 1.2 ns, up to 5 V

    Comparator

    Table 29. Comparator Signal Configuration
    Signal type Single-ended, referenced to the DGS pin when connected. Otherwise referenced to GND.
    Programmable levels VOH, VOL
    Table 30. Comparator Voltage Levels
    Range (VOH, VOL) -2 V to 6 V
    Resolution (VOH, VOL) 122 µV
    Accuracy (VOH, VOL) ±25 mV, from -1.5 V to 5.8 V, warranted
    Table 31. Comparator Characteristics
    Programmable input termination modes High Z, 50 Ω to VTERM, Active Load
    Leakage current <15 nA, in the High Z termination mode

    Active Load

    Table 32. Programmable Levels
    Programmable levels IOH, IOL
    Table 33. Commutating Voltage (VCOM)
    Range -2 V to 6 V
    Resolution 122 µV
    Table 34. Current Levels
    Range 150 µA to 24 mA
    Resolution 488 nA
    Accuracy
    • ±14 µA for current level ≤512 µA, typical
    • ±93 µA for current level >512 µA, typical

    PPMU

    PPMU Force Voltage

    Table 35. PPMU Force Voltage Signal Type
    Signal type Single-ended, referenced to the DGS pin when connected. Otherwise referenced to GND.
    Table 36. PPMU Force Voltage Levels
    Range (NI-Digital 17.5 and earlier) -2 V to 6 V
    Range (NI-Digital 18.0 and later)

    -2 V to 6 V

    6 V to 7 V in Extended Voltage Range
    Resolution 122 μV
    Accuracy (NI-Digital 17.5 and earlier) ±15 mV, 1 MΩ load, from -2 V to 6 V, warranted
    Accuracy (NI-Digital 18.0 and later)

    ±15 mV, 1 MΩ load, from -2 V to 6 V, warranted

    ±50 mV, 1 MΩ load, from 6 V to 7 V, typical
    Note The Extended Voltage Range is an unwarranted mode of operation that allows the PMU to force voltages between 6 V and 7 V for applications that can tolerate more error than the normal force voltage accuracy.

    PPMU Measure Voltage

    Table 37. PPMU Measure Voltage Signal Type
    Signal type Single-ended, referenced to the DGS pin when connected. Otherwise referenced to GND.
    Table 38. PPMU Measure Voltage Levels
    Range -2 V to 6 V
    Resolution 228 μV
    Accuracy ±5 mV, warranted

    PPMU Force Current

    Table 39. PPMU Force Current Accuracy
    Range Resolution Accuracy
    ±2 µA 60 pA ±1% of range for Zone 1 of Figure 4. Warranted Current Accuracy Zone for PPMU Force Current, warranted
    ±32 µA 980 pA ±1% of range for Zone 1 of Figure 4. Warranted Current Accuracy Zone for PPMU Force Current, warranted
    ±128 μA 3.9 nA ±1% of range for Zone 1 of Figure 4. Warranted Current Accuracy Zone for PPMU Force Current, warranted
    ±2 mA 60 nA ±1% of range for Zone 1 of Figure 4. Warranted Current Accuracy Zone for PPMU Force Current, warranted
    ±32 mA 980 nA ±1% of range for Zone 1 of Figure 4. Warranted Current Accuracy Zone for PPMU Force Current, warranted
    Figure 4. Warranted Current Accuracy Zone for PPMU Force Current


    Note The boundaries of Zone 1 are inclusive of that zone. The area outside of Zone 1 does not have a warranted specification for PPMU force current accuracy.

    How to Calculate PPMU Force Current Accuracy

    1. Specify the desired forced current.
    2. Based on the desired forced current, select an appropriate current range from Table 39. PPMU Force Current Accuracy.
    3. Divide the desired forced current from step 1 by the current range from step 2 and multiply by 100 to calculate the Percent of Current Range Forced.
    4. Based on the impedance of the load, calculate the voltage required to force the desired current from step 1. Use the following equation: Voltage Required = Desired Current × Load Impedance.
    5. Using Figure 4. Warranted Current Accuracy Zone for PPMU Force Current, locate the zone in which the Percent of Current Range Forced calculated in step 3 intersects with the voltage calculated in step 4. If the intersection is outside of Zone 1, then there are no warranted specifications. To get warranted specifications, the current range and/or forced current must be adjusted until the intersection is in Zone 1.
    6. Based on the zone found in step 5, use Table 39. PPMU Force Current Accuracy to calculate the accuracy of the forced current.
    Table 40. PPMU Voltage Clamps
    Range -2 V to 6 V
    Resolution 122 μV
    Accuracy ±100 mV, typical

    PPMU Measure Current

    Table 41. PPMU Measure Current Accuracy
    Range Resolution Accuracy
    ±2 μA 460 pA
    ±32 μA 7.3 nA
    ±128 μA 30 nA
    ±2 mA 460 nA
    ±32 mA 7.3 μA
    Figure 5. Warranted Current Accuracy Zones for PPMU Measure Current


    Note The boundaries of Zone 1 are inclusive of that zone. All other boundaries are inclusive of Zone 2. The area outside of Zone 1 and Zone 2 does not have a warranted specification for PPMU measure current accuracy.

    How to Calculate PPMU Measure Current Accuracy

    1. Specify the desired measured current.
    2. Based on the desired measured current, select an appropriate current range from Table 41. PPMU Measure Current Accuracy.
    3. Divide the desired measured current from step 1 by the current range from step 2 and multiply by 100 to calculate the Percent of Current Range Measured.
    4. If forcing voltage and then measuring current, Voltage in Figure 5. Warranted Current Accuracy Zones for PPMU Measure Current is equal to the forced voltage. If forcing current and then measuring current, Voltage in Figure 5. Warranted Current Accuracy Zones for PPMU Measure Current is equal to the voltage required to force the desired current based on the impedance of the load. Use the following equation: Voltage Required = Desired Current × Load Impedance.
    5. Using Figure 5. Warranted Current Accuracy Zones for PPMU Measure Current, locate the zone in which the Percent of Current Range Measured calculated in step 3 intersects with the Voltage calculated in step 4. If the intersection is outside of Zone 1 or Zone 2, then there are no warranted specifications. To get warranted specifications, the current range and forced current or forced voltage must be adjusted until the intersection is in Zone 1 or Zone 2.
    6. Based on the zone found in step 5, use Table 41. PPMU Measure Current Accuracy to calculate the accuracy of the measured current.

    PPMU Programmable Aperture Time

    Table 42. Aperture Time
    Minimum 4 μs
    Maximum 65 ms
    Resolution 4 μs
    Figure 6. Voltage Measurement Noise for Given Aperture Times, Typical


    Pattern Control

    Opcodes

    Refer to the following table for supported opcodes. Using matched and failed opcode parameters with multiple PXIe-6570 instruments requires the PXIe-6674T synchronization module. Other uses of flow-control opcodes with multiple PXIe-6570 instruments only require NI-TCLK synchronization.

    Category Supported Opcodes
    Flow Control
    • repeat
    • jump
    • jump_if
    • set_loop
    • end_loop
    • exit_loop
    • exit_loop_if
    • call
    • return
    • keep_alive
    • match
    • halt
    • scan
    Sequencer Flags and Registers
    • set_seqflag
    • clear_seqflag
    • write_reg
    Signal and Trigger
    • set_signal
    • pulse_signal
    • clear_signal
    • reset_trigger
    Digital Source and Capture
    • capture_start
    • capture
    • capture_stop
    • source_start
    • source
    • source_d_replace
    Note The source_d_replace opcode is only available with NI-Digital 18.0 or later.

    Pipeline Latencies

    Table 43. Pipeline Latencies
    Minimum delay between source_start opcode and the first source opcode or subsequent source_start opcode 3 μs
    Matched and failed condition pipeline latency 80 cycles

    Source and Capture

    Table 44. Digital Source
    Operation modes Serial and parallel; broadcast and site-unique
    Source memory size 32 MB (256 Mbit) total
    Maximum waveforms 512
    Table 45. Digital Capture
    Operation modes Serial and parallel; site-unique
    Capture memory size 1 million samples
    Maximum waveforms 512
    Note To learn how to calculate achievable data rates for Digital Source or Digital Capture, visit ni.com/info and enter the Info Code DigitalSourceCapture to access the Calculating Digital Source Rate tutorial or the Calculating Digital Capture Rate tutorial.

    Independent Clock Generators

    Note This functionality requires NI-Digital 18.0 or later.
    Table 46. Independent Clock Generators
    Number of clock generators 32 (one per pin)
    Clock period range 6.25 ns to 40 μs (160 MHz to 25 kHz)[7]7 Clocks with a period <7.5 ns will have a non-50% duty cycle.
    Clock period resolution 38 fs

    Frequency Measurements

    Note This functionality requires NI-Digital 17.0 or later.
    Table 47. Frequency Counter Measure Frequency
    Range 5 kHz to 200 MHz, 2.5 ns minimum pulse width
    Accuracy See Calculating Frequency Counter Error

    Calculating Frequency Counter Error

    Use the following equation to calculate the frequency counter error (ppm).

    ( T B e r r ( 1 − T B e r r ) + 20 ⁢   ns ( M e a s u r e m e n t ⁢   T i m e − U n k n o w n ⁢   C l o c k ⁢   P e r i o d ) ) × 1 , 000 , 000

    where

    • Measurement Time is the time, in seconds, over which the frequency counter measurement is configured to run
    • Unknown Clock Period is the time, in seconds, of the period of the signal being measured
    • TBerr is the error of the Clk100 timebase

    Refer to the following table for a few examples of common Clk100 timebase accuracies.

    Table 48. TBerr
    PXI Express Hardware Specification Revision 1.0 PXIe-1085 Chassis PXIe-6674T Override
    100 µ (100 ppm) 25 µ (25 ppm) 80 n (80 ppb)

    Example 1: Calculating Error with a PXIe-1085 Chassis

    Calculate the error of performing a frequency measurement of a 10 MHz clock (100 ns period) with a 1 ms measurement time using the PXIe-Clk100 provided by the PXIe-1085 chassis as the timebase.

    Solution

    ( 25 µ ( 1 − 25 µ ) + 20 ns ( 1 ms − 100 ns ) ) × 1 , 000 , 000 = 45 ⁢   ppm

    Example 2: Calculating Error when Overriding with the PXIe-6674T

    Calculate the error if you override the PXIe-Clk100 timebase with the PXIe-6674T and increase the measurement time to 10 ms.

    Solution

    ( 80 n ( 1 − 80 n ) + 20 ns ( 10 ms − 100 ns ) ) × 1 , 000 , 000 = 2 ⁢   ⁢ ppm

    Power Requirements

    The PXIe-6570 draws current from a combination of the 3.3 V and 12 V power rails. The maximum current drawn from each of these rails can vary depending on the PXIe-6570 mode of operation. The total power consumption will not exceed the input power specification.

    Table 49. Input Power
    Input power 68 W
    Table 50. Current Draw
    3.3 V 4.4 A
    12 V 4.7 A

    Environmental Guidelines

    Notice This model is intended for use in indoor applications only.

    Environmental Characteristics

    Table 51. Temperature
    Operating 0 °C to 45 °C
    Storage -40 °C to 71 °C
    Table 52. Humidity
    Operating 10% to 90%, noncondensing
    Storage
    Table 53. Pollution Degree
    Pollution degree 2
    Table 54. Maximum Altitude
    Maximum altitude 2,000 m (800 mbar) (at 25 °C ambient temperature)
    Table 55. Shock and Vibration
    Operating vibration 5 Hz to 500 Hz, 0.3 g RMS
    Non-operating vibration 5 Hz to 500 Hz, 2.4 g RMS
    Operating shock 30 g, half-sine, 11 ms pulse

    Calibration Interval

    Table 56. Calibration Interval
    Calibration Interval 1 year

    1 The system channel count is the maximum number of channels available when using multiple PXIe-6570 instruments in a single chassis as a digital subsystem. Some functionality described in this document requires that a PXIe-6674T synchronization module be used in conjunction with each digital subsystem.

    2 If the total voltage sourced or driven on any pin relative to GND exceeds the supported measurement range, instrument performance may be degraded.

    3 Voltages > 6 V require the Extended Voltage Range mode of operation. For additional information, refer to the PXIe-6570 Specifications.

    4 Sourced from chassis 100 MHz backplane reference clock, external 10 MHz reference, or PXIe-6674T.

    5 The SBC format is not supported within the 2x edge multiplier mode.

    6 31 time sets can be configured. One additional time set, represented by a -, repeats the previous time set.

    7 Clocks with a period <7.5 ns will have a non-50% duty cycle.