Sample Clock and Sampled Reference Clock Synchronization

When you lock all PXIe-5645 modules to phase-aligned Reference Clocks, the Sample Clocks on all modules are phase aligned. However, the Sample Clocks and Sampled Reference Clocks on all PXIe-5645 modules are not yet synchronized.

The following table provides information on NI-RFSA and NI-RFSG trigger types and their respective sync trigger master properties, sync trigger dist line properties, and digital edge source property values. Use the information in this table to complete the following procedure.

NI-RFSA and NI-RFSG Synchronization Triggers and Properties

Driver Availability Trigger Type Sync Trigger Master Sync Trigger Dist Line Digital Edge Source Value
NI-RFSA and NI-RFSG Start Sync Start Trigger Master Sync Start Trigger Dist Line Sync_Start
NI-RFSA Reference Sync Ref Trigger Master Sync Ref Trigger Dist Line Sync_Ref
Advance Sync Advance Trigger Master Sync Advance Trigger Dist Line Sync_Advance
NI-RFSG Script Sync Script Trigger Master Sync Script Trigger Dist Line Sync_Script
Note Synchronization is not supported using the NI-RFSA Arm Reference Trigger or the NI-RFSA or NI-RFSG Configuration List Step Trigger.

Synchronizing Sample Clock and Sampled Reference Clock Signals

Complete the following steps to synchronize the Sample Clocks and Sampled Reference Clocks of multiple PXIe-5645 modules using NI-RFSA and NI-RFSG.

  1. Set the Reference Clock source to PXI_CLK or RefIn on all devices based on your application.
  2. Determine whether to use one or more of the Start, Reference, Advance, or Script trigger types based on your application.
  3. Set the sync trigger master to True, and the sync trigger dist line to an available trigger line on the master device. Use the sync trigger master and sync trigger dist line that correspond to the trigger type, as shown in the previous table.
  4. Complete the following steps for all slave devices:
    1. Set the trigger type determined in step 2 to Digital Edge, and set the corresponding digital edge source value, as shown in the previous table.
    2. Set the sync trigger master to False, and set the sync trigger dist line to the same trigger line that was used in step 3. Refer to the previous table to determine which sync trigger master and sync trigger dist line to use.
  5. Commit the master device.
  6. Commit all slave devices.
  7. Initiate all slave devices.
  8. Initiate the master device.

Synchronization Example

For example, the following steps use the previous procedure to synchronize the Sample Clocks and Sampled Reference Clocks of multiple PXIe-5645 modules using the Start Trigger and the PXI_Trig0 and PXI_Trig1 external trigger lines.
  1. Set the Reference Clock source to PXI_CLK or RefIn on all devices based on your application.
  2. Set the Sync Start Trigger Master to True and set the Sync Start Trigger Dist Line to PXI_Trig0 on the master device.
  3. Complete the following steps for all slave devices:
    1. Set the Start Trigger to Digital Edge and set the Start Trigger Digital Edge Source to Sync_Start.
    2. Set the Sync Start Trigger Master to False and set the Sync Start Trigger Dist Line to PXI_Trig0.
  4. Commit the master device.
  5. Commit all slave devices.
  6. Initiate all slave devices.
  7. Initiate the master device.