Creating, Discovering, and Deploying a User-Defined I/O Variable
- Updated2025-10-10
- 2 minute(s) read
- Connect the master and NI-9145 to the network.
- Load the Scan Mode personality on the NI-9145.
- Create the FPGA target in the LabVIEW Project Explorer.
- Right-click the NI-9145 item and select Add User-Defined Variable.
- In the Shared Variable Properties dialog box, name this variable Set FPGA LED. Ensure that the data type of the variable matches the FPGA I/O that the variable maps to. In this example, select Boolean.
-
Set the Direction as Host to FPGA
and click OK.
LabVIEW creates a User-Defined Variables container and adds this user-defined variable under the container.
- Right-click the real-time controller and select . Rename this VI My Host VI.
- Drag and drop the Set FPGA LED variable from the Project Explorer on the block diagram.
-
Wire a Boolean control to Set FPGA LED as shown in the
following figure.
- Right-click the real-time controller and select Deploy All.
-
Use one of the following methods to ensure that the Scan Engine is in
Configuration Mode.
- Right-click the real-time controller from the Project Explorer and select .
- You can also use the NI Distributed System Manager. Select the real-time target in the left tree, and in the Scan Engine tab, ensure is green. If the color is not green, click the Change to Configuration button.
- Right-click the FPGA target and select . Rename this VI My FPGA VI.
- Drag and drop the FPGA LED from on the block diagram.
-
Drag and drop the Set FPGA LED variable from the
Project Explorer on the block diagram. Wire its data
out to FPGA LED as shown in the following figure.
-
Click the Run button.
LabVIEW automatically compiles, downloads, and runs the FPGA VI on the FPGA target.
- Right-click the real-time controller and select .
- Double-click My Host VI.vi in the Project Explorer.
- Click the Run button.
-
Click the LED control in the front panel.
Then the application starts to control the FPGA LED in the NI-9145.
Related Information
- User-Defined Variable
User-defined variables transfer custom FPGA-processed data between an FPGA VI and an RT VI.
- Compiling, Downloading, and Running an FPGA VI