User-Defined Variable
- Updated2025-10-10
- 1 minute(s) read
User-defined variables transfer custom FPGA-processed data between an FPGA VI and an RT VI.
You can add user-defined I/O variables to the block diagrams of FPGA VIs and RT VIs running on the target. Use the variables to communicate between the FPGA on the NI-9145 and host real-time target. All I/O variables are unidirectional, so you must configure the direction of each user-defined I/O variable. Configure the direction as either FPGA to Host or Host to FPGA.
For example, you can acquire analog I/O data and perform an FFT on the data in an FPGA VI. Use an FPGA to Host I/O variable to transfer the processed data to a control loop in an RT VI. Then use a Host to FPGA I/O variable to transfer output data from the RT control loop back to the FPGA for output to the physical I/O channel.