Data Position Delay Resolution
- Updated2023-02-21
- 2 minute(s) read
NI digital waveform generator/analyzers have three internal independent delay mechanisms, one for dynamic generation, one for dynamic acquisition, and one for the exported Sample clock. The delay mechanisms are capable of delaying the data and clock positions by up to one full Sample clock period. Refer to the specifications document for your device for valid frequencies and ranges for delays.
For NI 6547/6548 devices, channels are arranged into three different banks for multibank data delay.
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Note NI 656x devices have special considerations for legal delayed data settings for Sample clock frequencies between 25 and 50 MHz. |
The following table lists the resolution of the delay mechanisms for the frequencies that the NI digital waveform generator/analyzer internal Sample clock can produce. For externally supplied frequencies above 25 MHz that are not listed in this table, the delay resolution is 1/256 of the Sample clock period.
| Operating Frequency* | Resolution/Step Size† |
|---|---|
| 200 MHz | 20 ps‡ |
| 100 MHz | 39 ps‡ |
| 66.7 MHz | 59 ps‡ |
| 50 MHz | 78 ps |
| 40 MHz | 98 ps |
| 33.3 MHz | 117 ps |
| 28.6 MHz | 137 ps |
| 25 MHz | 156 ps |
| *Not all operating frequencies
may be applicable on your device. †These values are not supported for NI 6544/6545/6547/6548 devices. Refer to the device specifications document for more information about the supported step sizes. ‡For NI 656x devices, refer to the device specifications document for more information about the supported step sizes. |
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