Reset
- Updated2025-12-16
- 2 minute(s) read
Reset the CAN port to the same state as when the FPGA VI started running.
- Resets the SJA1000.
- Restores all properties to their default values.
When a CAN controller enters the Bus Off state (Comm State property), it no longer communicates. Like most CAN controllers, the SJA1000 does not allow recovery from Bus Off to Error Active using the CAN controller register set. This behavior is normal within an embedded system (vehicle), but many test setups intentionally generate Bus Off, and therefore require a mechanism to recover (i.e. to run the test again). By performing a complete reset of the SJA1000, this method recovers from the Bus Off state.
This method also clears the output FIFO as well as any pending CAN node (including all Wait methods). The reset affects only the specified CAN port, and has no effect on the other CAN port of the module. For step by step instructions to place this method in your LabVIEW FPGA VI block diagram, refer to the I/O Methods introduction.