NI ATCA FPGA Modules VIs
- Updated2023-02-21
- 2 minute(s) read
This section contains technical and programming support for using the NI ATCA LabVIEW API. This section provides reference material for the NI ATCA VIs.
Use the NI ATCA VIs to develop applications for your ATCA-3671 module and adapter modules.
| Palette Object | Description |
|---|---|
| ATCA-3671 Open FPGA Reference | Is required to connect to an FPGA from the host. It calls the transfer VI underneath to send over the bitstream, then initiates a normal FPGA open call. |
| ATCA-3671 Get FPGA ID | Queries the ATCA-3671 FPGA ID of the RIO device specified by the resource string. It is called by several built-in VIs, but also may be used directly to programmatically determine the location of a given FPGA device in large applications. |
| ATCA-3671 Transfer Bitstream | Initiates a connection to lvsrv and transfers the bitstream contents over the network when open and called by the ATCA-3671 Open FPGA Reference VI. |
| ATCA-3671 Configure Jitter Cleaner | Sends a command using lvsrv to set the jitter cleaner parameters and returns whether the PLL is locked after reprogramming. |
| ATCA-3671 Configure RTM Line Rate | Configures the retimers on the QSFP ports of the RTM-3661 to run at the given line rate. Each call affects a single lane, so the VI must be called in a loop to configure entire ports at a time. |
| ATCA-3671 Remote Bitstream Download | Triggers a remote download of a .lvbitx file (LabVIEW FPGA bitstream) that is currently in memory on the ATCA System-on-Module (SOM) onto one of the ATCA-3671 FPGAs, reprogramming the device. |
| 3681 Generic Config | Reads/writes a configuration register of the attached AIO-3681 module. |
| 3681 Gain Config | Reads/writes the gain range configuration setting of an attached AIO-3681 module. |
| 3682 Generic Config | Reads/writes a configuration register of the attached AIO-3682 module. |
| 3682 Gain Config | Reads/writes the gain range configuration setting of an attached AIO-3682 module. |
| Route GLCK | Configures the GCLK multiplexer routing between the four ATCA FPGAs. |