NI-5783 Specifications

FlexRIO Documentation

Table 1. FlexRIO Documentation Locations and Descriptions
Document Location Description
Getting started guide for your FlexRIO FPGA module or Controller for FlexRIO Available from the Start menu and at ni.com/manuals. Contains installation instructions for your FlexRIO system.
Specifications document for your FlexRIO FPGA module or Controller for FlexRIO Available from the Start menu and at ni.com/manuals. Contains specifications for your FlexRIO FPGA module or Controller for FlexRIO.
Getting started guide for your adapter module Available from the Start menu and at ni.com/manuals. Contains signal information, examples, and CLIP details for your adapter module.
Specifications document for your adapter module Available from the Start menu and at ni.com/manuals. Contains specifications for your adapter module.
LabVIEW FPGA Module Help Embedded in LabVIEW Help and at ni.com/manuals. Contains information about the basic functionality of the LabVIEW FPGA Module.
Real-Time Module Help Embedded in LabVIEW Help and at ni.com/manuals. Contains information about real-time programming concepts, step-by-step instructions for using LabVIEW with the Real-Time Module, reference information about Real-Time Module VIs and functions, and information about LabVIEW features on real-time operating systems.
FlexRIO Help Available from the Start menu and at ni.com/manuals. Contains information about the FPGA module front panel connectors and I/O, controller for FlexRIO front panel connectors and I/O, programming instructions, and adapter module component-level IP (CLIP).
LabVIEW Examples Available in NI Example Finder. In LabVIEW, click Help » Find Examples » Hardware Input and Output » FlexRIO. Contains examples of how to run FPGA VIs and Host VIs on your device.
IPNet Located at ni.com/ipnet. Contains LabVIEW FPGA functions and intellectual property to share.
FlexRIO product page Located at ni.com/flexrio. Contains product information and data sheets for FlexRIO devices.

NI-5783 Pinout

Use the pinout to connect to terminals on the NI-5783.

Figure 1. NI-5783 Front Panel Connector Pinout


Table 2. Signal Descriptions
Signal Name Description
AO 0 to AO 3 Analog input channel, 50 Ω, single-ended, DC-coupled
AI 0 to AI 3 Analog output channel, 50 Ω, single-ended, DC-coupled
CLK/REF IN External Reference Clock or Sample Clock input
TRIG Trigger input and output channel
AUX I/O Digital I/O and PFI connector
Caution To avoid damaging the NI-5783, disconnect all connected signals before powering down. Connect signals after the adapter module powers on by the FlexRIO FPGA module or Controller for FlexRIO.
Caution Connections that exceed the maximum ratings of connectors on the NI-5783 might damage the device and the chassis. NI is not liable for any damage resulting from such connections.

AUX I/O Connector

Figure 1. AUX I/O Connector Pinout


Table 3. Signal Descriptions
Pin Signal Signal Description
1 DIO Port 0 (0) Bidirectional single-ended (SE) digital I/O (DIO) data channel.
2 GND Ground reference for signals.
3 DIO Port 0 (1) Bidirectional SE DIO data channel.
4 DIO Port 0 (2) Bidirectional SE DIO data channel.
5 GND Ground reference for signals.
6 DIO Port 0 (3) Bidirectional SE DIO data channel.
7 DIO Port 1 (0) Bidirectional SE DIO data channel.
8 GND Ground reference for signals.
9 DIO Port 1 (1) Bidirectional SE DIO data channel.
10 DIO Port 1 (2) Bidirectional SE DIO data channel.
11 GND Ground reference for signals.
12 DIO Port 1 (3) Bidirectional SE DIO data channel.
13 PFI 0 Bidirectional SE DIO data channel.
14 NC No connect.
15 PFI 1 Bidirectional SE DIO data channel.
16 PFI 2 Bidirectional SE DIO data channel.
17 GND Ground reference for signals.
18 +5 V +5 V power (10 mA maximum).
19 PFI 3 Bidirectional SE DIO data channel.
Caution The AUX I/O connector accepts a standard, third-party HDMI cable, but the AUX I/O port is not an HDMI interface. Do not connect the AUX I/O port on the NI-5783 to the HDMI port of another device. NI is not liable for any damage resulting from such signal connections.

Analog Input

Typical Specifications

Full-scale input range (normal operating conditions)

Elliptic

2.030 Vpk-pk

Butterworth

2.037 Vpk-pk

DC accuracy

Elliptic

±[(0.80% × reading) + 3.5 mV]

Butterworth

±[(1.00% × reading) + 3.75 mV]

Input impedance

Elliptic

50 Ω ± 0.5%

Butterworth

50 Ω ± 0.8%

Bandwidth (-3 dB)

Elliptic

39.4 MHz

Butterworth

39.5 MHz

Table 4. AI Spectral Performance
SNR1 Measured at 10.1 MHz with a -1 dBFS signal adjusted to full-scale.[1] SINAD[1] ENOB (bits)[2]2 Calculated from SINAD corrected to fullscale. SFDR[3]3 Measured at 10.1 MHz with a -1 dBFS signal.
74.5 dBFS 74.3 dBFS 12.05 -87 dBc
Note All AI spectral performance values apply to both the Elliptic and Butterworth variants.
Table 5. AI Noise Spectral Density
Filter Variant nV/√(Hz) dBm/Hz dBFS/Hz
Elliptic 17.5 -142.1 -152.2
Butterworth 17.8 -142.0 -152.1
Table 6. AI Channel Crosstalk (10 MHz)
Channel N±1 Channel N±2 Channel N±3
-79 dBc -87 dBc -91 dBc
Note All AI channel crosstalk values apply to both the Elliptic and Butterworth variants.
Figure 1. AI Crosstalk


Figure 1. AI Frequency Response (Zoomed Out)


Figure 1. AI Frequency Response (Zoomed In)


Figure 1. AI Step Response (Butterworth)


Figure 1. AI Step Response (Elliptic)


Figure 1. AI Spectral (10.1 MHz at -1 dBFS input signal, 6.1 kHz RBW, 10 Averages)


Note AI Spectral figure applies to both the Elliptic and Butterworth variants.
Figure 1. AI Return Loss


Analog Output

General Characteristics

Number of channels

Four, single-ended, simultaneously updated

Connector type

HDBNC (high-density BNC)

Output type

50 Ω

Output coupling

DC

Digital-to-analog converter (DAC)

Type

Quad, 16-bit

Part number

DAC3484

Minimum analog input to analog output response time[4]4 Minimum time to digitize a signal (AI) and output a response (AO). Time measured from signal entering the AI connector, passing into and out of the LabVIEW FPGA diagram, and observed at the AO connector.

100 MS/s

1130 ns

200 MS/s

720 ns

400 MS/s

550 ns

Table 7. AO Sample Rates
Clocking Mode Data Rate (per channel) DAC Update Rate (per channel)
Internal Clock, 2x interpolation5 400 MS/s with 2x interpolation is available only when operating in 2 channel analog output mode.[5] 400 MS/s 800 MS/s
Internal Clock, 4x interpolation (default clocking mode) 200 MS/s 800 MS/s
Internal Clock, 8x interpolation 100 MS/s 800 MS/s
External Clock, 2x interpolation[5] 240 MS/s to 400 MS/s 480 MS/s to 800 MS/s
External Clock, 4x interpolation 120 MS/s to 200 MS/s 480 MS/s to 800 MS/s
External Clock, 8x interpolation 60 MS/s to 100 MS/s 480 MS/s to 800 MS/s

Typical Specifications

Full-scale output range (normal operation conditions)

50 Ω

1.001 Vpk-pk

High-Z

2.002 Vpk-pk

DC accuracy (into High-Z)

±[(2.0% × desired voltage) + 4.4 mV]

Output impedance

50 Ω ± 0.7%

SFDR[6]6 10.1 MHz tone at -1 dBFS.

-81 dBc

Table 8. AO Noise Spectral Density (into 50 Ω)
nV/√(Hz) dBm/Hz dBFS/Hz
5.8 -151.7 -155.7
Table 9. AO Channel Crosstalk (10 MHz)
Channel N±1 Channel N±2 Channel N±3
-90 dBc -98 dBc -99 dBc
Figure 1. AO Crosstalk (into 50 Ω Load)


Figure 1. AO Frequency Response Across Data Rate


Figure 1. AO Phase Noise (Signal at 12.1 MHz)


Figure 1. AO Return Loss


Figure 1. AO Two Tone, Each Tone at -7 dBFS, 69.95 MHz, and 70.05 MHz, 500 Hz RBW


Note The noise floor in the above figure is limited by the noise floor of the measurement device. Refer to the AO Noise Spectral Density table for more information.

CLK/REF IN

Connector type

HDBNC (high-density BNC)

Input impedance

50 Ω

Input coupling

AC

Reference input voltage range

0.75 Vpk-pk to 5.2 Vpk-pk

Sample Clock input voltage range

0.4 Vpk-pk to 5.2 Vpk-pk

Absolute maximum voltage

±8.0 VDC, 8.0 Vpk-pk AC

Duty cycle

45% - 55%

Clock Configuration External Clock Type External Clock Frequency Description
Internal Clock PLL Off[7]7 Default clocking configuration. The internal VCXO acts as a free-running Sample Clock.
Internal Clock PLL On (TbRef) 10 MHz The internal VCXO locks to TbRefClk, which is provided through the backplane.
Internal Clock PLL On (CLK/REF IN) Reference Clock 10 MHz The internal VCXO locks to an external Reference Clock, which is provided through the CLK/REF IN front panel connector.
External Clock PLL Off (CLK/REF IN) Sample Clock 60 MHz to 100 MHz An external Sample Clock can be provided through the CLK/REF IN front panel connector.
Internal VCXO phase noise

10 Hz

-80 dBc/Hz

100 Hz

-110 dBc/Hz

1 kHz

-140 dBc/Hz

10 kHz

-150 dBc/Hz

100 kHz

-155 dBc/Hz

1 MHz

-160 dBc/Hz

10 MHz

-162 dBc/Hz

Figure 1. Internal Sample Clock Phase Noise


TRIG General Characteristics

Number of channels

1, single-ended

Connector type

HDBNC

Coupling

DC

Impedance

Input

10 kΩ

Output

50 Ω

Logic level

3.3 V LVCMOS

Voltage

VIH_MIN

2 V

VIL_MAX

0.8 V

VOH_MIN (unloaded)

3.1 V

VOL_MAX (unloaded)

0.2 V

Absolute maximum voltage

±20 VDC, +21 dBm (7.1 Vpk-pk)

AUX I/O (Port 0 DIO <0..3>, Port 1 DIO <0..3>, and PFI <0..3>

Number of channels

12 bidirectional (8 DIO and 4 PFI)

Connector type

HDMI

Interface standard

3.3 V LVCMOS

Interface logic

Maximum VIL

0.8 V

Minimum VIH

2.0 V

Maximum VOL

0.4 V

Minimum VOH

2.7 V

Maximum VOH

3.6 V

Zout

50 Ω ± 20%

Iout (DC)

±2 mA

Pull-down resistor

150 kΩ

Recommended operating voltage

-0.3 V to 3.6 V

Overvoltage protection

±10 V

Maximum toggle frequency

100 MHz

+5 V maximum current

10 mA

+5 V voltage tolerance

4.2 V to 5 V

Power

Total power, typical operation

4.6 W

Physical

Dimensions

12.9 x 2.0 x 12.1 cm (5.1 x 0.8 x 4.7 in.)

Weight

420 g (14.8 oz)

Front panel connectors

Ten HDBNC and one HDMI

Environment

Maximum altitude

2,000 m (800 mbar) (at 25 °C ambient temperature)

Pollution Degree

2

Indoor use only.

Operating Environment

Ambient temperature range

0 °C to 40 °C

Relative humidity range

10% to 90%, noncondensing

Storage Environment

Ambient temperature range

-40 °C to 71 °C

Relative humidity range

5% to 95%, noncondensing

Shock and Vibration

Operating shock

30 g peak, half-sine, 11 ms pulse

Random vibration

Operating

5 Hz to 500 Hz, 0.3 g RMS

Nonoperating

5 Hz to 500 Hz, 2.4 g RMS

Compliance and Certifications

Safety Compliance Standards

This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:

  • IEC 61010-1, EN 61010-1
  • UL 61010-1, CSA C22.2 No. 61010-1
Note For safety certifications, refer to the product label or the Product Certifications and Declarations section.

Electromagnetic Compatibility

This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:
  • EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
  • EN 55011 (CISPR 11): Group 1, Class A emissions
  • EN 55022 (CISPR 22): Class A emissions
  • EN 55024 (CISPR 24): Immunity
  • AS/NZS CISPR 11: Group 1, Class A emissions
  • AS/NZS CISPR 22: Class A emissions
  • FCC 47 CFR Part 15B: Class A emissions
  • ICES-001: Class A emissions
Note In the United States (per FCC 47 CFR), Class A equipment is intended for use in commercial, light-industrial, and heavy-industrial locations. In Europe, Canada, Australia, and New Zealand (per CISPR 11), Class A equipment is intended for use only in heavy-industrial locations.
Note Group 1 equipment (per CISPR 11) is any industrial, scientific, or medical equipment that does not intentionally generate radio frequency energy for the treatment of material or inspection/analysis purposes.
Note For EMC declarations, certifications, and additional information, refer to the Product Certifications and Declarations section.

Product Certifications and Declarations

Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for NI products, visit ni.com/product-certifications, search by model number, and click the appropriate link.

Environmental Management

NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.

For additional environmental information, refer to the Engineering a Healthy Planet web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.

EU and UK Customers
  • Waste Electrical and Electronic Equipment (WEEE)—At the end of the product life cycle, all NI products must be disposed of according to local laws and regulations. For more information about how to recycle NI products in your region, visit ni.com/environment/weee.
  • 电子信息产品污染控制管理办法(中国RoHS)
  • 中国RoHSNI符合中国电子信息产品中限制使用某些有害物质指令(RoHS)。关于NI中国RoHS合规性信息,请登录 ni.com/environment/rohs_china。(For information about China RoHS compliance, go to ni.com/environment/rohs_china.)
  • 1 Measured at 10.1 MHz with a -1 dBFS signal adjusted to full-scale.

    2 Calculated from SINAD corrected to fullscale.

    3 Measured at 10.1 MHz with a -1 dBFS signal.

    4 Minimum time to digitize a signal (AI) and output a response (AO). Time measured from signal entering the AI connector, passing into and out of the LabVIEW FPGA diagram, and observed at the AO connector.

    5 400 MS/s with 2x interpolation is available only when operating in 2 channel analog output mode.

    6 10.1 MHz tone at -1 dBFS.

    7 Default clocking configuration.