Reads the I/O data from the I/O items. This function waits for new I/O data to become available through the Generate I/O Sample Pulse Method function.

The following connector pane displays the parameters that appear when this function is outside a single-cycle Timed Loop.


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Inputs/Outputs

  • cerrcodeclst.png error in —

    error in describes error conditions that occur before this node runs. This input provides standard error in functionality.

  • FPGA I/O In —

    FPGA I/O In is an optional input that allows you to specify the FPGA I/O item to read or write using an FPGA I/O control or constant. To use an FPGA I/O control as a connector pane input, the FPGA VI must be configured for reentrant execution.

  • cpoly.png Timeout —

    specifies the maximum time, in number of clock ticks, that the function waits until it can write to an I/O item without overwriting data. A value of -1 prevents the function from timing out, so the function completes execution only when it writes all data. If Timeout is 0 and this function cannot write data immediately, a timeout occurs. If a timeout occurs, previously written data remains intact.

  • Ready for Output —

    Ready for Output specifies whether downstream nodes are ready for this node to return a new value. The default is TRUE. Use a Feedback Node to wire the Ready for Input output of a downstream node to this input of the current node.

    Note If this terminal is FALSE during a given cycle, the output valid terminal returns FALSE during that cycle.

    To display this terminal, right-click the function and select Inside single-cycle Timed Loop from the shortcut menu.

  • ierrcodeclst.png error out —

    error out contains error information. This output provides standard error out functionality.

  • FPGA I/O Out —

    FPGA I/O Out returns the FPGA I/O In.

  • ipoly.png I/O Item —

    I/O Item is the data read from the FPGA I/O item.

  • ipoly.png Timed Out —

    returns TRUE if this function times out. If Timed Out is TRUE, this function did not write data to any I/O items.

  • Output Valid —

    Output Valid returns TRUE if this node has computed a result that downstream nodes can use. Wire this output to the Input Valid input of a downstream node to transfer data from the node to the downstream node.

    To display this terminal, right-click this function and select Inside single-cycle Timed Loop from the shortcut menu.

    • Read I/O Details

    To select a method, first configure the node with an I/O item.

    Note Not all targets support the User-Controlled I/O Sampling functions.

    If multiple Read I/O Method functions contain the same I/O item, all functions reference the same data buffer. A read from any function will return the oldest unread data, and data that the Generate I/O Sample Pulse Method function acquires will overwrite the oldest element in the buffer. If the node contains multiple I/O items, this node reads data only if each I/O item has unread data available for reading.

    Single-Cycle Timed Loop Support

    This node is supported inside and outside the single-cycle Timed Loop if the target supports it. Right-click the function and select Execution Mode»Outside single-cycle Timed Loop or Inside single-cycle Timed Loop to specify where the function executes.

    Error Handling Details

    You can use the error terminals to place this node in the data flow of the VI as well as to ensure the data you receive is valid. FPGA targets might report errors differently. Refer to the specific FPGA target hardware documentation for information about how specific FPGA targets report errors.