You can create subVIs that work with interfaces from different FPGA VIs or bitfiles as long as the relevant portions of the communication hardware interface to the host are compatible. The communication hardware interface includes the following:

  • Names and types of controls and indicators
  • Names, data types, and types of DMA or peer-to-peer FIFOs
  • Names, directions, and types of target-specific methods

These subVIs can work with any FPGA reference that implements the specified interface, even if the reference is to VIs or bitfiles on different target types. For example, you can use the same subVI for both a PCI and a PXI target.

To make an FPGA reference dynamic, place a checkmark in the Dynamic mode checkbox of the Configure Open FPGA VI Reference dialog box. You also can use the FPGA Interface Dynamic Refnum constant and Dynamic FPGA Interface Cast function to specify an FPGA interface. To create a subVI, change the constant to a control or indicator by right-clicking the constant and selecting Change to Control or Change to Indicator from the shortcut menu.

Edit-Time and Run-Time Errors

LabVIEW returns edit-time and run-time errors when using the dynamic mode of FPGA interfaces. The following examples describe situations when edit-time or run-time errors may occur:

  • Edit-time error—Occurs if you use an Invoke Method function to configure a FIFO and then remove the FIFO from the project. The Invoke Method function causes a broken Run button.
  • Run-time error—Occurs if you cast a reference using the Dynamic FPGA Interface Cast function and use a Read/Write Control function to access an indicator, foo, on a reference that does not contain foo.

Ensuring that Dynamic Mode References Do Not Break Downstream Nodes

If you configure the FPGA VI reference with the dynamic mode option and it contains more elements than a subVI interface requires, you can encounter coercion problems that may break downstream nodes. To ensure that the dynamic FPGA interface reference that exits the subVI contains the same elements as the FPGA interface reference that entered the subVI, you have the following options:

  • Branch the input wire to the reference from the calling VI.
  • Wire the input reference of the subVI directly to the output reference.