Computes the quotient of the inputs.


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Inputs/Outputs

  • cdbl.png x —

    x can be a scalar number, array or cluster of numbers, array of clusters of numbers, and so on.

  • cdbl.png y —

    y can be a scalar number, array or cluster of numbers, array of clusters of numbers, and so on.

  • idbl.png x/y —

    x/y is a double-precision, floating-point number if both x and y are integers. In general, the output type is the widest representation of the inputs if the inputs are not integers or if their representations differ.

    Note You can manually configure this function to output data of a type you want. To specify the output data type, right-click the function and select Properties to display the Object Properties dialog box. On the Output Configuration page, click the Representation icon and select the data type you want. A blue coercion dot appears on the output terminal of the function to indicate that you have configured the output data type.

    • Fixed-Point Details

    If you wire fixed-point values to this function, by default LabVIEW configures the integer word length of the quotient to avoid overflow for nonzero values of y. However, because the precision of the quotient can be infinite, rounding conditions always occur. Use the Numeric Node Properties dialog box to configure how LabVIEW handles rounding of fixed-point data. This function always uses the Saturate overflow mode to handle overflow.

    FPGA Module Details

    The following details apply when you use this object in an FPGA VI.

    Note The following details are subject to change with each version of the LabVIEW FPGA Module.
    Single-Cycle Timed Loop Not supported.
    Usage If you use this function with the single-precision floating-point data type, refer to the Using the Single-Precision Floating-Point Data Type and Deciding Which Data Type to Use in FPGA Designs topics for resource use, latency, and single-cycle Timed Loop support implications.
    Timing This function usually requires clock cycles in proportion to the number of bits in x/y. If you use this function with the fixed-point data type and select the Round-Half-Up rounding mode, the function requires one more clock cycle than the other two rounding modes.
    Resources Division is an expensive operation on the FPGA. In general, the function requires FPGA resources proportional to the number of bits in x, y, and x/y. If you use this function with the fixed-point data type, the rounding mode might impact resources.
    Notes You also can use the High Throughput Divide function to perform fixed-point math and analysis on an FPGA target.