PXIe-5641R device support ships with two memory interfaces which provide access to the external DRAM memory. When you enable the DRAM memory bank in the DRAM General Properties dialog box, any compatible memory interfaces are automatically displayed in the Memory Interface window.

The following table lists all NI-developed memory interfaces that are compatible with the external DRAM memory banks on PXIe-5641R devices and a basic overview of their functionality.

Memory Interface Name Memory Interface Description
Random Access - 128 Bit Provides a high-performance random access interface to external memory. Use this for maximum performance or if you require a random access-based memory interface. The data port is 128 bits wide.
FIFO - 128 Bit Provides a FIFO-based interface to external memory. When using this memory interface, the entire memory bank is treated as a large FIFO. Use this if your throughput application requires a straightforward, FIFO-based memory interface. The data port is 128 bits wide.