Represents all the current and voltage levels applicable to pattern bursting.

Derives from

Syntax

Namespace: NationalInstruments.ModularInstruments.NIDigital

public class DigitalLevels : DigitalSubObject

Remarks

These voltages and currents apply to the pin set when the SelectedFunction is Digital.
Note

Example applications are located in the <Public Documents>\National Instruments\NI-Digital\Examples\DotNET 4.x directory or in the Start menu at National Instruments » NI Digital Pattern Examples.

Thread Safety

All members of this type are safe for multithreaded operations.

Properties

NameDescription
Ioh

Gets or sets the current that the DUT sources to the active load while outputting a voltage above Vcom.

Iol

Gets or sets the current that the DUT sinks from the active load while outputting a voltage below Vcom.

TerminationMode

Gets or sets the behavior of the pin when pin driver is in a non-drive cycle.

Vcom

Gets or sets the commutating voltage at which the active load circuit switches between between sourcing current and sinking current.

Vih

Gets or sets the input voltage that the digital pattern instrument applies to the input of the DUT when the test instrument drives a logic high (1).

Vil

Gets or sets the input voltage that the digital pattern instrument applies to the input of the DUT when the test instrument drives a logic low (0).

Voh

Gets or sets the output voltage from the DUT above which the comparator on the test instrument interprets a logic high (H).

Vol

Gets or sets the output voltage from the DUT below which the comparator on the test instrument interprets a logic low (L).

Vterm

Gets or sets the termination voltage the instrument applies during non-drive cycles when the TerminationMode is set to Vterm. The instrument applies the termination voltage through a 50 Ω parallel termination resistance.

Methods

NameDescription
ConfigureActiveLoadLevels(double, double, double)

Configures the Ioh, Iol, and Vcom values.

ConfigureVoltageLevels(double, double, double, double, double)

Configures the high and low logic levels for voltage as well as the termination mode input voltage.