KU040 FPGA, 4 GB DRAM, x8 Gen 3 PCI FlexRIO MDK Device—The PCIe-7982 provides a LabVIEW-programmable Xilinx Kintex UltraScale KU040 FPGA with a mezzanine connector interface for hosting custom I/O developed using the Module Development Kit for FlexRIO. The mezzanine interface exposes eight Xilinx GTH transceivers for data movement in addition to LVDS and single-ended GPIO for configuration, clocking, and triggering. The PCIe-7982 also features an Auxiliary I/O connector with eight single-ended GPIO for digital communication and triggering, as well as four Xilinx GTH transceivers for data streaming at up to 16 Gbps per lane.