Avoid high cpu usage and identify common Xilinx compilation errors. Use third party tools to probe internal FPGA signals if needed.
Testing and Debugging LabVIEW FPGA Code The LabVIEW FPGA Module includes several simulation options. It is important to understand when and how to use each option in the design verification process. This document helps you make decisions about using the different LabVIEW FPGA simulation options for testing a design.
Interpreting Common Xilinx Compilation Errors in the LabVIEW FPGA Module "The compilation failed due to a Xilinx error." This error indicates that the design has failed and that you should look for errors from the Xilinx compiler rather than the typical LabVIEW error messages. This article discusses some of the more common Xilinx errors that may be encountered and provides tips for troubleshooting these errors from the perspective of LabVIEW code.
Remote FPGA Debugging with ChipScopeTM ,XVC and LabVIEW Incorporate Xilinx® ChipScope™ into a LabVIEW FPGA design and use the Xilinx® Virtual Cable (XVC) protocol to emulate a JTAG interface over TCP. This allows remote or local ChipScope™ debugging within a LabVIEW FPGA application without having to make any physical JTAG connections or use any physical cable connects.