||Fixed an issue in which the DRAM FIFO Instrument Design Library did not reset properly, and the status information was incorrect.
||Fixed an issue in which PCI rebalancing occurred in certain hardware combinations or very large systems that included NI PXIe-796XR or NI PXIe-797XR FPGA modules and sometimes caused an operating system crash on boot.
||Fixed an issue that caused NI MAX and System Configuration API to hang when using an unknown adapter module.
||Fixed an issue that caused the NI-793xR - MGT Aurora CLIP example to allocate an incorrect instruction address size on the FPGA in LabVIEW 2015.
||Fixed an issue that caused LabVIEW Real-Time system running the PharLAP OS to hang with 100% CPU usage during a reboot in some cases when using an NI PXIe-796XR FPGA module.
||Fixed an issue in which the FlexRIO High-Throughput Streaming example did not accurately demonstrate how to stream at the full bandwidth on PXIe-797x FPGA modules.
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