Implies Function
- 已更新2025-07-30
- 閱讀時間為 3 分鐘
Negates x and then computes the logical OR of y and the negated x. Both inputs must be Boolean values, numeric values, or error clusters. If x is TRUE and y is FALSE, the function returns FALSE. Otherwise, it returns TRUE.
The connector pane displays the default data types for this polymorphic function.
Inputs/Outputs
x
—
x must be a Boolean value or a number. x can be a scalar, array or cluster of numbers or Boolean values, array of clusters of numbers or Boolean values, and so on. If x is an error cluster, only the status parameter of the error cluster passes to the input terminal.
y
—
y must be a Boolean value or a number. y can be a scalar, array or cluster of numbers or Boolean values, arrays of clusters of numbers or Boolean values, and so on. If y is an error cluster, only the status parameter of the error cluster passes to the input terminal. 
x .implies. y?
—
x .implies. y? is the logical OR of y and of the logical negation of x. |
Implies Truth Table
| x | y | x .implies. y? |
|---|---|---|
| T | T | T |
| T | F | F |
| F | T | T |
| F | F | T |
FPGA Module Details
The following details apply when you use this object in an FPGA VI.
| Single-Cycle Timed Loop | Supported. |
| Usage | For maximum time and resource efficiency, use Boolean functions inside a single-cycle Timed Loop. |
| Timing | Inside single-cycle Timed Loop--When you use Boolean functions inside a single-cycle Timed Loop, each Boolean operation adds slightly to the combinatorial logic delay of the single-cycle Timed Loop. Outside single-cycle Timed Loop--When you use Boolean functions outside a single-cycle Timed Loop, each Boolean operation requires one clock cycle. |
| Resources | Boolean functions consume significant FPGA resources only when you wire a large array to the input. Consider limiting arrays to conserve FPGA resources. |
Examples
Refer to the following example files included with LabVIEW.
- labview\examples\Booleans\Boolean Functions.vi