The USB-6453 features four analog output (waveform generation) timing signals.

  • AO Start Trigger Signal
  • AO Pause Trigger Signal
  • AO Sample Clock Signal
  • AO Sample Clock Timebase Signal

AO Start Trigger Signal

Use the AO Start Trigger (ao/StartTrigger) signal to initiate a waveform generation.

If you do not use triggers, you can begin a generation with a software command.

Retriggerable Analog Output

The AO Start Trigger is configurable as retriggerable. The timing engine generates the sample clock for the configured generation in response to each pulse on an AO Start Trigger signal.

The timing engine ignores the AO Start Trigger signal while the clock generation is in progress. After the clock generation is finished, the counter waits for another Start Trigger to begin another clock generation.

The following figure shows a retriggerable AO generation of four samples.

Figure 41. Retriggerable Analog Output


Using a Digital Source

To use AO Start Trigger with a digital source, specify a source and an edge. The source can be one of the following signals:

  • A pulse initiated by host software
  • DIO <0..15>
  • AI Start Trigger (ai/StartTrigger)
  • AI Reference Trigger (ai/ReferenceTrigger)
  • Counter n Internal Output
  • Change Detection Event
  • DI Start Trigger (di/StartTrigger)
  • DI Reference Trigger (di/ReferenceTrigger)
  • DO Start Trigger (do/StartTrigger)

The source can also be one of several other internal signals on the USB-6453. Refer to Device Routing in MAX for more information.

You can also specify whether the measurement acquisition begins on the rising edge or falling edge of AO Start Trigger.

Routing AO Start Trigger Signal to an Output Terminal

You can route AO Start Trigger out to any DIO <0..15> terminal. The output is an active high pulse.

AO Pause Trigger Signal

Use the AO Pause Trigger (ao/PauseTrigger) signal to mask off samples in a DAQ sequence.

When AO Pause Trigger is active, no samples occur. AO Pause Trigger does not stop a sample that is in progress. The pause does not take effect until the beginning of the next sample.

When you generate analog output signals, the generation pauses as soon as the pause trigger is asserted. If the source of your sample clock is the onboard clock, the generation resumes as soon as the pause trigger is deasserted, as shown in the following figure.

Figure 42. AO Pause Trigger with the Onboard Clock Source


If you are using any signal other than the onboard clock as the source of your sample clock, the generation resumes as soon as the pause trigger is deasserted and another edge of the sample clock is received, as shown in the following figure.

Figure 43. AO PauseTrigger with Other Signal Source


Using a Digital Source

To use AO Pause Trigger, specify a source and a polarity. The source can be any of the following signals:

  • DIO <0..15>
  • Counter n Internal Output
  • Counter n Gate
  • AI Pause Trigger (ai/PauseTrigger)
  • AO Pause Trigger (ao/PauseTrigger)
  • DO Pause Trigger (do/PauseTrigger)

The source can also be one of several other internal signals on USB-6453. Refer to Device Routing in MAX for more information.

You can also specify whether the samples are paused when AO Pause Trigger is at a logic high or low level.

Routing AO Pause Trigger Signal to an Output Terminal

You can route AO Pause Trigger out to any <DIO 0..15> terminal.

AO Sample Clock Signal

Use the AO Sample Clock (ao/SampleClock) signal to initiate AO samples.

Each AO Sample Clock edge simultaneously updates all of the DACs for channels in the task. You can specify an internal or external source for AO Sample Clock. You can also specify whether the DAC update begins on the rising edge or falling edge of AO Sample Clock.

Using an Internal Source

One of the following internal signals can drive AO Sample Clock:

  • AO Sample Clock Timebase (divided down)
  • Counter n Internal Output
  • Change Detection Event
  • Counter n Sample Clock
  • AI Convert Clock (ai/ConvertClock)
  • AI Sample Clock (ai/SampleClock)
  • DI Sample Clock (di/SampleClock)
  • DO Sample Clock (do/SampleClock)

A programmable internal counter divides down the AO Sample Clock Timebase signal.

Several other internal signals can be routed to AO Sample Clock through internal routes. Refer to Device Routing in MAX for more information.

Using an External Source

Use DIO <0..15> as the source of AO Sample Clock.

Routing AO Sample Clock Signal to an Output Terminal

You can route AO Sample Clock (as an active low signal) out to any DIO <0..15> terminal.

Other Timing Requirements

The AO timing engine on the USB-6453 internally generates AO Sample Clock unless you select some external source. AO Start Trigger starts the timing engine and either the software or hardware can stop it once a finite generation completes. When using the AO timing engine, you can also specify a configurable delay from AO Start Trigger to the first AO Sample Clock pulse. By default, this delay is two ticks of AO Sample Clock Timebase. The following figure shows the relationship of AO Sample Clock to AO Start Trigger.

Figure 44. AO Sample Clock and AO Start Trigger


AO Sample Clock Timebase Signal

Use the AO Sample Clock Timebase (ao/SampleClockTimebase) signal to specify a higher frequency clock source to divide down to produce the desired AO Sample Clock rate.

You can route any of the following signals to be the AO Sample Clock Timebase signal:

  • 100 MHz Timebase (default)
  • 20 MHz Timebase
  • 100 kHz Timebase
  • DIO <0..15>

AO Sample Clock Timebase is not available as an output on the I/O connector.

You can use an external sample clock signal as AO Sample Clock Timebase signal 
by dividing the signal down in a DAQ device. You can also use it as AO Sample Clock 
signal without dividing the signal.