The PXIe-8290 supports the following two primary workflows when used with the PXIe-7903 or the PXIe-5842.

  • Prebuilt IP Streaming—Users can stream data from a VST or through a PXIe-7903 without modifying the FPGA IP. This workflow is well suited for users who are not digital hardware engineers. The workflow uses pre-developed FPGA IP and the RDMA protocol to transfer data to a server. This approach simplifies development and avoids the complexity of low-level FPGA design.
  • Custom FPGA Development—Some users need more advanced workflows. These users can choose to modify the FPGA IP. This step can occur before streaming data to or from a server or compatible device. The workflow requires expertise in HDL development. The Aurora-based implementation supports common use cases. Some users might need different protocols. In those cases, users must source or develop their own solutions. Aurora is a Xilinx protocol. AMD provides extensive documentation for users who want to customize or extend the design.
    Note The term server refers to a networked storage or processing system used for data streaming. This should not be confused with the Vivado compilation server, which is used to generate FPGA bitfiles.