Synchronization
- Updated2024-04-08
- 2 minute(s) read
Synchronization
Synchronization is important to minimize skew between channels and to eliminate clock drift between modules in long-duration operations.
Reference Clock Synchronization
With reference clock synchronization modules generate their ADC sample clock from the shared 100 MHz reference clock on the PXIe backplane (PXIe_CLK100). The backplane supplies an identical copy of this clock to each peripheral slot. In addition, multiple chassis can be synchronized by using a timing and synchronization board to lock the 100 MHz clock across chassis.
When acquiring data from multiple modules within the same NI-DAQmx task, NI-DAQmx automatically handles all of the Reference Clock Synchronization details required to synchronize the modules within the task. This is known as a multi-device task.
- Specify PXIe_CLK100 as the reference clock source for all modules to force all the modules to lock to the reference clock on the PXIe chassis.
- Choose one module to provide the start trigger.
- Configure the rest of the modules in your system to receive their start trigger from the start trigger module. This ensures that all modules will begin returning data on the same sample.
- Set the synchronization type of the modules receiving the Start Trigger at to Slave and the module providing the start trigger to Master.
- Start all of the modules using the start trigger. This sets them up to expect the master start trigger.
- Start the master start trigger module task. You can now acquire data.