Sample Timing Modes

In this section the following terminology is used:

• Convert is a single ADC quantized digitization of the input signal.
• Sample is the data returned from hardware.

Software-Timed Acquisitions

Software controls the rate of the acquisition. Software sends a separate command to the hardware to acquire each sample. In NI-DAQmx, software-timed acquisitions are referred to as having on-demand timing. Software-timed acquisitions are also referred to as immediate or static acquisitions and are typically used for reading a single sample of data.

Hardware-Timed Acquisitions

With hardware-timed acquisitions, a digital hardware signal (AI Sample Clock) controls the rate of the acquisition. This signal can be generated internally on the device or provided externally.

Hardware-timed acquisitions have several advantages over software-timed acquisitions:

• The time between samples can be much shorter.
• The timing between samples is deterministic.
• Hardware-timed acquisitions can use hardware triggering.

Hardware-timed operations can be buffered or hardware-timed single point (HWTSP). The PXIe-4309 supports buffered hardware-timed operations.

A buffer is a temporary storage in computer memory for to-be-transferred samples. Data is moved from the PXIe-4309 module's onboard FIFO memory to a PC buffer using DMA before it is transferred to application memory. Buffered acquisition typically allows for much faster transfer rates because data is moved in large blocks.

One property of buffered I/O operations is the sample mode. The sample mode can be either finite or continuous:

• Finite sample mode acquisition refers to the acquisition of a specific, predetermined number of data samples. Once the specified number of samples has been read in, the acquisition stops. If you use a reference trigger, you must use finite sample mode.
• Continuous acquisition refers to the acquisition of an unspecified number of samples. Instead of acquiring a set number of data samples and stopping, a continuous acquisition continues until you stop the operation. Continuous acquisition is also referred to as double-buffered or circular-buffered acquisition.

  If data cannot be transferred across the bus fast enough, the FIFO becomes full. New acquisitions overwrite data in the FIFO before it can be transferred to host memory, which causes the device to generate an error. With continuous operations, if the user program does not read data out of the PC buffer fast enough to keep up with the data transfer, the buffer could reach an overflow condition, causing an error to be generated.

Typically, HWTSP operations are used to write single samples at known time intervals. While buffered operations are optimized for high throughput, HWTSP operations are optimized for low latency and low jitter. HWTSP can notify software if it falls behind hardware. These features make HWTSP ideal for real time control applications. HWTSP operations, in conjunction with the Wait For Next Sample Clock function, provide tight synchronization between the software layer and the hardware layer. For more information, refer to the document NI-DAQmx Hardware-Timed Single Point Lateness Checking.