PXIe-4144 Pinout
- Updated2023-09-15
- 1 minute(s) read
PXIe-4144 Pinout
The following figure shows the terminals on the PXIe-4144 connector.
Signal Name | Description |
---|---|
CH <0..3> Output HI | HI force terminal connected to channel power stage (generates and/or dissipates power). Positive polarity is defined as voltage measured on HI > LO. |
CH <0..3> Guard | Buffered output that follows the voltage of the HI force terminal. Used to drive shield conductors surrounding HI force and Sense HI conductors to minimize effects of leakage and capacitance on low level currents. |
CH <0..3> Output LO | LO force terminal connected to channel power stage (generates and/or dissipates power). Positive polarity is defined as voltage measured on HI > LO. |
CH <0..3> Sense HI | Voltage remote sense input terminals. Used to compensate for I*R voltage drops in cable leads, connectors, and switches. |
CH <0..3> Sense LO | |
NC | No Connect. |
Note
PXIe-4144 channels are bank-isolated from earth ground, but also
share a common LO.